SIE run 2 schedule

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This page keeps track of the road to manufacturing the SIE Boards.

NOTE, SAKC has been renamed SIE. So, some places SIE is referred to as SAKC.


[edit] Hardware

Item Description Planned End date Status
Schematics, OrCAD Version design files V2 design files are released about SIE by Carlos Camargo, check Changes from RC1 to RC2. July 31th, now solving power from USB & DC adapter for V3, V2 without solutions on it. Done
Bom Check V2 Bom needed to be initially released by Carlos Carmargo, then estimate bom cost July 31th Done
Evaluation Check all required documents qualified for production and wait for Carlos's results about manually soldering on V2, then determine pcb qty or change this schedule. The following actions will be based on this item. August 10th Done
Receive PO Get firm orders from distributors before sourcing parts Done
Part Sourcing Order Plan, please see the column of "Order Status" in V2 Bom DONE Done
Gerber-Out to PCB maker Make PCBs, now finished checking V2 gerber files, checklist file. And officially gerbered out. August 11th Done
AI File Generation For SMT pick place process August 13th or within this week. Done
V2 PCB Back Check Confirm PCB quality August 18th or within this week. Done
Stencil Making For SMT, source here August 30th or within this week. Done
SMT & DIP Process Process in Manufacturer, the exact date is within this week, depends on last part's arrival and book of smt vendor. Sep. 3th SMT mounting. Sep. 6th AOI & DIP & others, Done on Sep. 7 Done
Test Plan & Report Describe test plan and test result status. Done

[edit] Packaging Materials - V2 won't have this

Item Description Planned End date Status
Box Not Started
Anti-static Bag Not Started
Accessories decide about accessories: USB cable? others? Not Started

[edit] Production - V2 won't have this

Item Description Planned End date Status
Production Test Plan Plan of initial test procedure, Flow Chart & Work Instructions of Test Stations 2 weeks Not Started
Test board tools/fixtures for IO connectors, J16/J19/J20 etc 2 weeks Not Started
Software for production test for IO connectors, J16/J19/J20 and chips, need coding help TBD Not Started

[edit] Software - V2 won't have this

Item Description Planned Start date Status
Official Sources & Images Not Started

[edit] Previous Runs

SAKC run 1 schedule, This is not a KiCad version.

[edit] Links

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