This page keeps track of the road to manufacturing the SIE Boards.
NOTE, SAKC has been renamed SIE. So, some places SIE is referred to as SAKC.
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[edit] Hardware
Item
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Description
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Planned End date
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Status
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Schematics, OrCAD Version design files
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V2 design files are released about SIE by Carlos Camargo, check Changes from RC1 to RC2.
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July 31th, now solving power from USB & DC adapter for V3, V2 without solutions on it.
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Done
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Bom Check
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V2 Bom needed to be initially released by Carlos Carmargo, then estimate bom cost
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July 31th
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Done
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Evaluation
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Check all required documents qualified for production and wait for Carlos's results about manually soldering on V2, then determine pcb qty or change this schedule. The following actions will be based on this item.
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August 10th
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Done
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Receive PO
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Get firm orders from distributors
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before sourcing parts
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Done
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Part Sourcing
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Order Plan, please see the column of "Order Status" in V2 Bom
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DONE
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Done
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Gerber-Out to PCB maker
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Make PCBs, now finished checking V2 gerber files, checklist file. And officially gerbered out.
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August 11th
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Done
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AI File Generation
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For SMT pick place process
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August 13th or within this week.
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Done
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V2 PCB Back Check
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Confirm PCB quality
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August 18th or within this week.
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Done
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Stencil Making
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For SMT, source here
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August 30th or within this week.
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Done
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SMT & DIP Process
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Process in Manufacturer, the exact date is within this week, depends on last part's arrival and book of smt vendor.
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Sep. 3th SMT mounting. Sep. 6th AOI & DIP & others, Done on Sep. 7
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Done
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Test Plan & Report
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Describe test plan and test result status.
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Done
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[edit] Packaging Materials - V2 won't have this
Item
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Description
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Planned End date
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Status
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Box
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Not Started
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Anti-static Bag
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Not Started
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Accessories
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decide about accessories: USB cable? others?
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Not Started
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[edit] Production - V2 won't have this
Item
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Description
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Planned End date
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Status
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Production Test Plan
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Plan of initial test procedure, Flow Chart & Work Instructions of Test Stations
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2 weeks
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Not Started
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Test board tools/fixtures
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for IO connectors, J16/J19/J20 etc
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2 weeks
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Not Started
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Software for production test
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for IO connectors, J16/J19/J20 and chips, need coding help
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TBD
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Not Started
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[edit] Software - V2 won't have this
Item
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Description
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Planned Start date
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Status
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Official Sources & Images
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Not Started
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[edit] Previous Runs
SAKC run 1 schedule, This is not a KiCad version.