Ingenic documentation errata

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Jz4740 Programming Manual, Release July 22, 2009, 539 pages


[edit] 3 External Memory Controller

[edit] Reed-Solomn

On Page 40 step 12 of the Nand Flash Program Sequence refers to RB bit of NFCSR. This bit does not exist and step 12 should read:

 12. Check RB# pin (GPIO) and wait until NAND flash is not busy.

[edit] 14 CODEC

[edit] 14.2.1 Codec Control Register 1 (CDCCR1)

On Page 279/280 there is a copy&paste error. The description for bit 24 should read:

24 EDAC Enable DAC
EDAC Description
0 The DAC is disabled. No DA conversion can be done
1 The DAC is enabled.

[edit] 22 USB

[edit] 22.4.2 Memory Map

On page 432, it says that the control and status registers of all endpoints should exist non-indexed on address BASE+0x100+ep*0x10+offset. This means CSR0 should be available on address BASE+0x102. Using this address does not work, however. I did not test if the other non-indexed addresses do work, or if they don't exist at all.

[edit] 22.8.3 READ REQUESTS

On page 459 it tells how to respond to a read request from the host. Following this doesn't work, because one important step is missing: Before filling the fifo, the SETUP packet must be acknoledged. The pm says that upon receiving the request, instead of setting DataEnd you should fill the fifo and set InPktRdy (and DataEnd if it's the last packet). However, it only works when doing this _after_, not _instead of_. This can be fixed by adding "and the DataEnd bit (D3)" after "the ServicedOutPktRdy bit (D6)" in the last sentence of the second paragraph.

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