Development Tools
NOTE, SAKC has been renamed SIE. So, some places SAKC is referred to as SAKC. |
Contents |
[edit] Porting Qi-kernel and Qi-uboot to SIE
SIE and BEN have similar architectures, so, we decide use the QI-openwrt repository with SIE
ToDo List
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[edit] Differences Between BEN and SIE
Board Name | BEN | SIE |
---|---|---|
Processor | JZ4720 | JZ4725 |
Memory | 32MB | 64MB |
SD Card | 4 bits | 1 bit |
SD_CD_PIN | GPD0 | GPC27 |
Audio input | MIC | MIC R/L_LineIN |
ADIN0 | Battery | User defined |
ADIN1 | Battery | User defined |
I2C port | NoAv | Available |
CS2N | NAND | FPGA |
Keyboard | Available | NoAv |
USBDET, SHDN_HOST, USB_ID, SDPWEN, POP, AMPEN, PW_ON_N, CHARGE_N | Available | NoAV |
[edit] Porting U-Boot
[edit] Obtain the Source Code
You must follow the instruction in this page to get the latest sources from QI development tools.
U-boot Source code is located under: [?]
- If exist, delete the /PATH/TO/openwrt-xburst/build_dir/linux-xburst/u-boot-2009.11 folder.
- Copy this patch to /PATH/TO/openwrt-xburst/target/linux/xburst/image/u-boot/patches.
Set u-boot for SIE
$ make menuconfig (select Build U-Boot bootloader in Target Images) (then change U-Boot target board from qi_lb60 to SIE) $ make
You will get u-boot binaries under:
/bin/xburst
[edit] Files
Makefile | [OK] board/qi_lb60/Makefile | board/sakc/Makefile [SAME] board/qi_lb60/config.mk | board/sakc/config.mk [SAME] board/qi_lb60/flash.c | board/sakc/flash.c [OK] board/qi_lb60/qi_lb60.c | board/sakc/sakc.c [OK:rev] board/qi_lb60/u-boot-nand.lds | board/sakc/u-boot-nand.lds [SAME] board/qi_lb60/u-boot.lds | board/sakc/u-boot.lds [SAME] common/env_common.c | [SAME] common/lcd.c | [SAME] common/main.c | [SAME] cpu/mips/Makefile | [OK] cpu/mips/cache.S | [SAME] cpu/mips/config.mk | [SAME] cpu/mips/cpu.c | [SAME] cpu/mips/start.S | [SAME] cpu/mips/jz4740.c | [SAME] cpu/mips/jz4740_cpm_test.c | [SAME] cpu/mips/jz4740_nand.c | [SAME] cpu/mips/jz_cs8900.c | [SAME] cpu/mips/jz_cs8900.h | [SAME] cpu/mips/jz_eth.c | [SAME] cpu/mips/jz_eth.h | [SAME] cpu/mips/jz_i2c.c | [SAME] cpu/mips/jz_lcd.c | [OK] [DELETED] cpu/mips/jz_lcd.h | [OK] [DELETED] cpu/mips/jz_mmc.c | [SAME] cpu/mips/jz_mmc.h | [SAME] cpu/mips/jz_serial.c | [SAME] cpu/mips/mmc_protocol.h | [SAME] cpu/mips/qi_lb60_gpm940b0.c | [SAME] cpu/mips/qi_lb60_gpm940b0.h | [SAME] cpu/mips/usb_boot.S | [SAME] drivers/mtd/nand/nand_base.c | [SAME] examples/standalone/mips.lds | [SAME] include/asm-mips/addrspace.h | [SAME] include/asm-mips/global_data.h | [SAME] include/asm-mips/jz4740.h | [SAME] include/configs/qi_lb60.h | include/configs/sakc.h [OK] include/lcd.h | [SAME] lib_mips/board.c | [SAME] lib_mips/bootm.c | [SAME] lib_mips/time.c | [SAME] nand_spl/board/qi_lb60/Makefile | nand_spl/board/sakc/Makefile [SAME] nand_spl/board/qi_lb60/config.mk | nand_spl/board/sakc/config.mk [SAME] nand_spl/board/qi_lb60/u-boot.lds | nand_spl/board/sakc/u-boot.lds [SAME] nand_spl/nand_boot_jz4740.c | [OK]
NOTES:Relevant changes
- File: Makefile
Added sakc_config:
sakc_config : unconfig @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h @echo "Compile NAND boot image for SAKC" @$(MKCONFIG) -a sakc mips mips sakc @echo "TEXT_BASE = 0x80100000" > $(obj)board/sakc/config.tmp @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
- File: /include/configs/sakc.h
Changes for SIE platform configuration:
... #define CONFIG_JZ4725 1 /* Jz4725 SoC */ ... #define CONFIG_SAKC 1 /* SAKC board */ #define MMC_BUS_WIDTH_1BIT 1 /* 1 for MMC 1Bit Bus Width */ ...
And removed unnecessary GPIO that are no include on SAKC board.
- FILE: /board/sakc.c
Only initialize this GPIOs:
... static void gpio_init(void) { /* * Initialize NAND Flash Pins */ __gpio_as_nand(); /* * Initialize SDRAM pins */ __gpio_as_sdram_16bit_4725(); /* * Initialize UART0 pins */ __gpio_as_uart0(); /* * Initialize LCD pins */ __gpio_as_lcd_18bit(); /* * Initialize MSC pins */ __gpio_as_msc(); /* * Initialize LCD pins */ __gpio_as_lcd_18bit(); /* * Initialize SSI pins */ __gpio_as_ssi(); /* * Initialize I2C pins */ __gpio_as_i2c(); /* * Initialize MSC pins */ __gpio_as_msc(); /* * Initialize Other pins */ __gpio_as_input(GPIO_SD_DETECT); __gpio_disable_pull(GPIO_SD_DETECT); } ...
We active the UART0. Note that SIE use the Jz4725, then we replace:
__gpio_as_sdram_32bit(); //For NanoNote (Jz4740)
for
__gpio_as_sdram_16bit_4725();
- FILE: /cpu/mips/jz_mmc.c
Changes for SD card configuration (4bit or 1bit):
#if defined(MMC_BUS_WIDTH_1BIT) mmc_simple_cmd(&request, SET_BUS_WIDTH, 1, RESPONSE_R1); #else mmc_simple_cmd(&request, SET_BUS_WIDTH, 2, RESPONSE_R1); #endif
- File: /nand_spl/nand_boot_jz4740.c
SIE board don't have keys, then is_usb_boot() function is call only if CONFIG_QI_LB60 is defined.
#if defined(CONFIG_QI_LB60) if(is_usb_boot()) { serial_puts("enter USB BOOT mode\n"); usb_boot(); } #endif