Milkymist One Power On Off Sequence

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Normal RC2 Power On Off Sequence

How do un-booted conditions generated?

Known bug on H/W and Solutions

Usefull pin of FPGA Configuration

PROGRAM_B :
During Configuration: Must be High to allow configuration to start. 
After Configuration: Drive PROGRAM_B Low and release to reprogram FPGA. Hold PROGRAM_B to force the FPGA 
 I/O pins into High-Z, allowing direct programming access to SPI flash PROM pins.

NOR FLASH Reset Specifications

Asserting RP# during a system reset is important with automated program/erase devices because systems typically expect to read from flash memory when coming out of reset. If a CPU reset occurs without a flash memory reset, proper CPU initialization may not occur. This is because the flash memory may be providing status information, instead of array data as expected. Connect RP# to the same active low reset signal used for CPU initialization. Also, because the device is disabled when RP# is asserted, it ignores its control inputs during power-up/down. Invalid bus conditions are masked, providing a level of memory protection. See Reset Operation Waveforms in JS28F256J3F105[1].

1, tVCCPH: Min. 300us, VCC Power valid to RP# de-assertion (high)
2, tPLPH: Min. 100ns, RP# pulse width low

Reference

  1. Numonyx JS28F256J3F105

Links

Operating Voltages of Milkymist One's Key Parts

Milkymist One RC2 Collective Waveforms Captured While Power On Off

Reset IC with 20us delay

Xilinx UG380 Spartan-6 FPGA Configuration User Guide

Spartan-6 - Why is INIT_B low after power-on?

Xilinx UG394 Spartan-6 FPGA Power Management User Guide

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