Icarus

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Icarus is a FPGA development/bitcoin mining board, it's a 6 layers PCB. has 2 XC6SLX150 -2FGG484I on it. there are100+ GPIOs on this board and plenty(50+) of interconnect wires between the 2 FPGAs. most of them are routed as diff-pairs. generates about ~360MH/s hashing power. 19.5W on wall power consuming.

Pictures

Without FAN and cooling plate: front, back

Power supply

Input: 100-240V~, 50-60Hz, 0.65A Max
Output : 12v, 2A
Connector: 5.5mm OD, 2.1mm ID (same with Milkymist One power connector)

LEDs

PWR_OK: power modules output are all in good voltage.
TXD1 and RXD1: for display transport on the USB UART bridge, but by a design miss, they are difficult to discriminate, and this function is also implemented on other LEDs, so will be removed in the future.
LED1: FPGA1 is busy, in the origin bitsteam, light means FPGA is working, but it changed to opposite.
LED2: TXD for FPGA1
LED3: RXD for FPGA1
LED4: valid nonce found by FPGA1. will light and fade out in 4 seconds.
LED5: FPGA2 is busy.
LED6: TXD for FPGA2
LED7: RXD for FPGA2
LED8: valid nonce found by FPGA2.

Communication protocol V3

The FPGAs on board or even in chain mode (under development) , act as a single miner to the uart port. when the board connect to a PC, it recognized as a ttyUSB device or COM on windows PC.

Operation

No detection is needed (no special command for this).
Wait work data: each data packet is 512bit (64 byte) length. the format is : 256bits MIDSTATE + 160bits fill bits(can be any value) + 96bits data (last 12 bytes of block header).
Send back the results if the fpga found a valid nonce, they will send back the 32bits nonce result immediately. no any query protocol is implemented here.

Simple work process is described

Send a work pass the COM port, start a timer and a listener on the COM port.
If any data send back by the COM port, then this is a valid nonce. push a new work to the FPGA and send the result back to the pool.
If no data send back in 11.3 seconds (a full cover time on 32bit nonce range by 380MH/s speed, maybe increase so a shorter time is suggested, like 8s ), send another work.

Info

FPGA will start the calculate when you push a work to them, even they are busy. that means if a block has been found, the miner could push a new immediately to overlap the old work in the fpga.
The 2 FPGAs on one board will distribute the 32bit nonce to calculate. one will calculate the 0 ~ 7FFFFFFF and the other will cover the 80000000 ~ FFFFFFFF. so if you want to do any performance measure on this device, please notice this feature.
FPGA will stop work when: a valid nonce has been found or 32 bits nonce range is completely calculated. notice that it's possible for 2 FPGA both find valid nonce in the meantime, the 2 valid nonce will all be send back.

Improve

Return nonce=0 once it gets to the end! so we know when it is finished - in V4, if we get a nonce=0 VERY quickly we know it is a real nonce or if the FPGA can send back a "I'm done" message, it would probably make it easier to do more efficiently.
Detection via the USB product/device ids is crucial to automatically adding it to Miner Software like(miner.py or CGminer).
Normal error rate is less than 0.1%, if the error rate goes high, that means something goes wrong. like FPGA too hot. needs additional fan, V3 bitstream got 0x08% under abcpool.co for 24 hours. tested by ngzhang
In case you (or someone else) produces protocol-compatible devices in the future, you may wish to provide a way to probe the number of FPGAs on the board and their speeds.
It would be good to have the ability to specify exact nonce ranges, so cgminer (or another miner) can support the noncerange extension in the future, or even split up work internally (a single work is sufficient for up to 4 GH/s). need change on HDL code
Reporting temperature/safety measurements can allows cgminer to shut off the FPGA if it gets too hot, need additional hardware.

Mining software

Cgminer

Written with C
Install cgminer in your PC:

$ git clone git://github.com/xiangfu/cgminer.git
$ cd cgminer
$ git checkout -b icarus origin/icarus
$ ./autogen.sh && ./configure --enable-icarus --disable-opencl --disable-adl && make
$ sudo make install

Setup with Icarus, connect Icarus to your PC. it will shows as /dev/ttyUSB0, running cgminer by:

$ cgminer -S /dev/ttyUSB0 -o http://pit.deepbit.net:8332/ -O xiangfu.z@gmail.com_0:1234

Modular Python Bitcoin Miner

Support long polling

Mining pool

Xiangfu setup a p2pool server in Beijing: http://www.openmobilefree.net:9332, for using p2pool, all you need do is use your bitcoin address as username for receive rewards. password was ignore, can by anything. for example: (username: 1AUuX4auVWUYByhLGP1okhWsHsSm9zxqmz, this is Xiangfu's bitcoin address, CHANGE THAT TO YOURS, password: x)

cgminer -S /dev/ttyUSB0 -o http://www.openmobilefree.net:9332/ -O 1AUuX4auVWUYByhLGP1okhWsHsSm9zxqmz:x

More: https://en.bitcoin.it/wiki/Comparison_of_mining_pools

Using TP-LINK TL-WR703N as host

Setup cgminer

Connect your laptop to the LAN/WAN ports of the TL-WR703ND and acquire an IP address via DHCP. It should come up under the 192.168.1.0/24 network then open http://192.168.1.1
Install OpenWrt (use Xiangfu's build trunk 29936 image, with cgminer pre-installled)
Reboot and setup password.
Network -> Interfaces -> LAN: Change IPv4 address from 192.168.1.1 to 192.168.x.1 if you want to avoid overlap with an existing router.
Network -> WIFI -> Scan(select your WIFI network) -> Join Network -> WPA passphrase -> Submit -> Save & Apply for connect to WIFI Internet
Network -> Firewall -> Traffic Rules -> Open ports on router, name: ssh, External port: 22 -> Add -> Save & Apply. now we can ssh through WAN network
Make sure WR703N can access Internet, ssh to your router. run screen first open a new terminal emulation. run cgminer like:

$ screen -S icarus
$ cgminer -S /dev/ttyUSB0 -o http://pit.deepbit.net:8332/ -O xiangfu.z@gmail.com_0:1234
$ Ctrl + a, d # will let you disconnect from icarus terminal emulation

you can re-connect the icarus terminal emulation by:

$ screen -r

If you have more Icarus. add -S one by one like -S /dev/ttyUSB0 -S /dev/ttyUSB1 -S /dev/ttyUSB2

Wifi connection for m1

Connect your laptop to the LAN/WAN ports of the TL-WR703ND and acquire an IP address via DHCP. It should come up under the 192.168.1.0/24 network then open http://192.168.1.1
Network -> WIFI -> Scan(select your WIFI network) -> Join Network -> WPA passphrase -> Submit -> Save & Apply for connect to WIFI Internet
Connect m1 to WR703N LAN/WAN port. enable the DHCP under 'Settings'

FPGA core

Modify base on ZTEX's miner core. it needs ISE 13.2 and Synplify E-2011.03-SP2 for get the final result.

First synthesize the stuff under ./miner_core by click Process->Implement Top Module, then you got a NGC file, named sha256_top.ngc.
Put sha256_top.ngc to ./miner , than run the flow by using Synplify E-2011.03-SP2 as synthesizer and ./src/miner_top.ncd as smartguide file(already setup by default. ise_p_using_smartguide), then synthesize the miner by click Process->Implement Top Module
about Smartguile file: execate smartXplorer500 times, use the best one as smartguild file

Verify FPGA core

Use this payload.py. just download it and running it like ./pyload.py -s /dev/ttyUSB0

PCB

1. Open ./AD10Project/S6.PrjPCB by Altium designer 10 to browse. also you can review the PDF file: ./SCHinPDF/Icarus.pdf.

2. Make sure total 15 libraries are imported, see compiled libraries and S61.PcbLib PCB library

Install Xilinx ISE

Download the Xilinux ISE webpack 13.2, I am using 'Xilinx_ISE_DS_Lin_13.2_O.61xd.0.0.tar', extact it and run xsetup

Install Xilinx cable driver

Checkout: cable driver manual, http://www.xilinx.com/support/answers/29310.htm

How To Flash

Flash by using iMPACT

You need install the ISE 13.2. then connect the Xilinx Cable Jtag to Icarus. open iMPACT. it should auto detect your Icarus two FPGAs. right click the FPGA. select Assign New Configuration File .... checkout this Picture.

Using Milkymist One JTAG/Serial duaghter board

Flash Chip

W25Q64CV: 64M-bit Serial Flash Memory with uniform 4KB sectors and Dual/Quad SPI, datasheet

BOM

BOM for v2.1a schematic but pcb buttom side rev. marked as v1.0a.

U3, U4 footprint does not coincide with Winbond W25Q64CVSSIG's 8-SOIC.

Links

Retrieved from "http://en.qi-hardware.com/wiki/Icarus"

Icarus

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