| lekernel | http://milkymist.org/3/mixxeo_preview.png | 15:19 |
|---|---|---|
| ysionneau | very pretty! | 15:27 |
| ysionneau | what software has been used to make this picture? | 15:30 |
| lekernel | hmm, don't remember atm (the design guys did it) | 17:12 |
| lekernel | I just remember it renders amazingly fast for a ray tracer, less than a minute | 17:13 |
| wpwrak | very elegant design | 17:50 |
| ysionneau | yep | 17:50 |
| davidc__ | lekernel: what are the flash A / flash B buttons for? boot image selection? | 18:18 |
| davidc__ | or for FX triggers? | 18:18 |
| lekernel | FX triggers. it's not *that* nerdy :) | 18:23 |
| kristian1aul | pretty and fresh indeed | 18:36 |
| barmstrong | that looks awesome. very polished! | 18:40 |
| rjo | lekernel: did you have a chance to look at the patches i sent? https://github.com/jordens/migen/compare/for-upstream | 20:32 |
| larsc | I demand a refund: http://metafoo.de/mixxeo.jpg ;) | 21:17 |
| ysionneau | ahah | 21:26 |
| ysionneau | this one is trying to escape | 21:26 |
| lekernel | rjo, got them, will check them out shortly. been very busy with other things lately. | 21:47 |
| lekernel | larsc, how does it stick? from the solder flux? | 21:49 |
| lekernel | larsc, did you fix the power problem by the way? | 21:50 |
| larsc | didn't try yet | 21:50 |
| larsc | I think the resistor is soldered to one of the pads | 21:50 |
| larsc | just with the wrong end | 21:51 |
| larsc | and the power issue is a bit strange anyway, sometimes it works just fine | 21:52 |
| lekernel | ah, so it's actually missing from the R16 pads? | 21:52 |
| larsc | yes | 21:52 |
| lekernel | I see. will send that pic to creotech. | 21:52 |
| rjo | lekernel: thanks. | 21:54 |
| lekernel | larsc, is the power problem also happening on other computers? | 21:56 |
| lekernel | or with a hub? have you checked the power with a scope and see if there's a drop? | 21:56 |
| larsc | I only tried shortly on two different laptops and what I was seeing is that the board would randomly reset itself during boot | 21:57 |
| larsc | I'm only assuming that it is a power issue | 21:57 |
| larsc | I'll try to actually get the board up and running next week | 21:58 |
| larsc | got too much stuff at work that still needs to be done before I go on vacation and I don't want to distract myself for now | 21:59 |
| lekernel | rjo, looking at the signed bug atm; seems the transfer of negative numbers between iverilog and python is buggy | 22:56 |
| lekernel | a = Signal((3, True), reset=-4) ==> s.rd(a) returns -4 | 22:57 |
| lekernel | a = Signal((4, True), reset=-4) ==> s.rd(a) returns 4 | 22:57 |
| davidc__ | lekernel: there's a bug in value_bits_sign FWIW (* operator doesn't return a (bits, sign) tuple - just bits) | 22:57 |
| davidc__ | lekernel: I think I have a patch, but I'm not 100% on whether I have the sign flag right for all cases :) | 22:58 |
| lekernel | all cases? result is signed if any operand is signed | 23:03 |
| davidc__ | yeah, I had False, True, True; just wanted to make sure I understood exactly what value_bits_sign was returning | 23:03 |
| lekernel | problem is in verilog or iverilog | 23:14 |
| lekernel | http://pastebin.com/PSLaSpEr not -4 | 23:14 |
| lekernel | xilinx fuse also prints 4 | 23:18 |
| lekernel | I wonder wtf the verilog standard came up with again this time ... | 23:19 |
| lekernel | http://pastebin.com/5395ZhyR gives the expected -4; so sign extension works - but they made an exception for constants?! | 23:21 |
| lekernel | ah, got it | 23:34 |
| lekernel | the "-X'sdY" syntax sets bit X in value Y, which may or may not be the sign bit | 23:35 |
| lekernel | sign extension with constants otherwise works. this is again an imbecilic thing to do, but at least it won't be hard to fix. | 23:35 |
| lekernel | will do that tomorrow. gn8. | 23:37 |
| --- Wed Dec 11 2013 | 00:00 | |
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