| lekernel | seriously | 10:37 |
|---|---|---|
| lekernel | verilog lets you divide strings by integers | 10:37 |
| lekernel | the result being some large integer, maybe the ascii representation of the string divided by that integer you gave | 10:38 |
| lekernel | yeah, it's that :) | 10:38 |
| ysionneau | sounds like php =) | 10:41 |
| larsc | as somebody who is dyslexic one of the most annoying 'features' of verilog is that you can use a wire without having to declare it | 10:44 |
| lekernel | I also like how lm32 defines "parameter eba_reset = `CFG_EBA_RESET" and then alternatively uses eba_reset and `CFG_EBA_RESET in the rest of the code | 10:44 |
| lekernel | ah, yes, that too... I think everyone has spent hours debugging something that came from that | 10:45 |
| larsc | I wish there was something like -pedantic for iverilog | 10:46 |
| ysionneau | ah yes, implicit wire declaration .... omg | 10:49 |
| lekernel | seems you'd stil need a $5k verilog linter these days... | 10:49 |
| lekernel | creotech have started testing their mixxeo boards :) | 20:34 |
| ysionneau | :) | 20:36 |
| --- Tue Nov 26 2013 | 00:00 | |
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