#milkymist IRC log for Wednesday, 2013-11-20

whitequarkhi folks13:58
whitequarkanyone interested to talk about wolfgang's fpgatools?13:58
wpwrakplanning to pick things up where he left off ?14:04
whitequarkmore or less14:05
wpwraksounds like a great idea to me14:05
Action: whitequark nods14:06
whitequarkI'd want to understand synthesis process better14:06
whitequarkas I understand it now, it's verilog -> RTL -> bitstream14:07
wpwraksebastien wrote something about it a while ago ... lemme search ...14:09
lekernelwhitequark, I'd suggest you use Migen for the RTL to netlist step14:14
lekernelthe AST is much simpler than Verilog's14:14
lekernelthere's some very draft code here https://github.com/nakengelhardt/mist and EDIF output for designs made entirely of instances is in Migen (and you can feed it to the Xilinx P&R)14:15
lekerneland you can, of course, run the Migen Verilog back-end to get Verilog netlists for free (nice for debugging)14:15
whitequarklekernel: interesting14:21
GitHub91[NetBSD] fallen pushed 1 new commit to master: http://git.io/YqOlpA14:22
GitHub91NetBSD/master 05cdb65 Yann Sionneau: First kernel to be able to print messages to UART console on Milkymist SoC14:22
ysionneauohoh, if whitequark starts to work on fpga tool ... then we might get something working nice in a short time :)14:25
ysionneaugood to know you are interested in fpga tools14:26
Action: whitequark is reading lekernel's pdf14:26
whitequarkok, I see14:32
whitequarkit's very convenient that the process consists of self-contained stages14:33
whitequarkso I could e.g. take netlists in EDIF and output bitstream while using someone else's synthesis tools (say migen).14:33
whitequarkwhat would be a good (xilinx, I assume) fpga series, for which most bitstream details are known?14:34
ysionneauit seems most of wolfgang work has been done on small Spartan 6 fpgas14:35
lekernelyes, afaik xilinx bitstreams are better known than altera's14:35
ysionneauand he understood a big deal of the bitstream format, since he was able to generate working bitstreams with his tool14:36
lekernelsome of the ISE interfacing work is already done with migen, you just have to add mode="mist" to the build function call to use the - currently extremely limited - synthesis support14:37
whitequarkjudging by his Makefiles he used x6slx914:39
whitequarkso this board will do fine - http://www.xess.com/shop/product/xula2-lx9/ - I want something small and not very expensive in case I kill it14:39
whitequarkor this... http://papilio.cc/index.php?n=Papilio.PapilioPro14:47
lekernelI have a Papilio Pro14:48
lekernelwould make it a tad easier to use your work if we have the same board :)14:49
whitequarkpapilio pro it is, then14:49
wpwraka bit over-engineered (you don't need ram and i think you could load the bitstream over jtag as well). but it would probably be hard to find something simpler14:49
whitequarkwpwrak: which one?14:49
ysionneauxiangfu was doing a very simple s6 board IIRC14:50
ysionneaubut you have to do it yourself14:50
lekernelRAM is great :) you want a netbsd with 1080p framebuffer demo, right?14:50
ysionneauyou cannot buy it14:50
wpwrakboth actually :)14:50
wpwraklekernel: heh ;-)14:50
wpwrakysionneau: you could fab and sell them ;-)14:51
whitequarkysionneau: I'd prefer to have as few points of failure as possible :)14:51
ysionneauwhitequark: I understand14:51
whitequarkso, bitstream (binary) corresponds 1:1 to a floorplan (textual)?15:04
whitequarkin fpgatools15:04
ysionneauAFAIK yes15:18
GitHub32[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/cdabf34bee2022d9115213f87f71c4ed257e9bea16:49
GitHub32migen/master cdabf34 Sebastien Bourdeauducq: flow/isd: update to new APIs16:49
GitHub190[misoc] sbourdeauducq pushed 3 new commits to master: http://git.io/Riz5Vw23:37
GitHub190misoc/master 96fcb35 Sebastien Bourdeauducq: Revert "framebuffer: reset VTG"...23:37
GitHub190misoc/master f5ba0ac Sebastien Bourdeauducq: videomixer: select 1024x768 by default23:37
GitHub190misoc/master 7496ba6 Sebastien Bourdeauducq: framebuffer: fix resynchronization after resolution change23:37
--- Thu Nov 21 201300:00

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