GitHub38 | [mibuild] sbourdeauducq pushed 1 new commit to master: http://git.io/rrh81Q | 16:18 |
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GitHub38 | mibuild/master 140ddd3 Sebastien Bourdeauducq: mixxeo: add DVI output pins | 16:18 |
GitHub115 | [milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/v4cMLw | 16:19 |
GitHub115 | milkymist-ng/master e6e04a2 Sebastien Bourdeauducq: framebuffer: prepare for DVI out | 16:19 |
lekernel | hmm, sending the output of ODDR2 to OBUFDS doesn't work? | 16:27 |
lekernel | ERROR:Pack:2531 - The dual data rate register "ODDR2_8" failed to join the | 16:27 |
lekernel | "OLOGIC2" component as required. The output signal for register symbol | 16:27 |
lekernel | ODDR2_8 requires general routing to fabric, but the register can only be | 16:27 |
lekernel | routed to ILOGIC, IODELAY, and IOB. | 16:27 |
_florent_ | strange... that's what is done on the s6ddrphy for boards with differential dqs | 16:37 |
_florent_ | https://github.com/milkymist/milkymist-ng/blob/master/milkymist/s6ddrphy/__init__.py#L186 | 16:37 |
_florent_ | except it's a OBUFTDS | 16:37 |
lekernel | let's try OBUFTDS then... | 16:41 |
_florent_ | stupid question, but are you sure the the oddr2 output is not used in the fpga fabric? | 16:50 |
_florent_ | http://forums.xilinx.com/t5/Spartan-Family-FPGAs/Pack-2531-The-dual-data-rate-register-quot-clock-clk-5p3M-quot/td-p/344879 | 16:50 |
lekernel | trying OBUFTDS... of course, it's only after a long compilation time that the ISE shitware tells me that I should also drive T with ODDR2 (and won't insert that ODDR2 automatically) | 16:54 |
lekernel | same error message | 16:55 |
lekernel | grmbl | 16:55 |
lekernel | ah, understoof | 16:57 |
lekernel | understood... I'm sending the output of that single ODDR2 to two IOBs | 16:57 |
GitHub98 | [milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/Ot4xHQ | 17:32 |
GitHub98 | milkymist-ng/master 1898034 Sebastien Bourdeauducq: framebuffer/phy: fix DVI clocking | 17:32 |
--- Wed Sep 18 2013 | 00:00 |
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