#milkymist IRC log for Wednesday, 2013-07-17

davidc__BTW - anyone looked at TORC? (http://torc-isi.sourceforge.net/subversion.php) azonenberg; might be of interest to you.00:11
davidc__lekernel: around? Any thoughts on that patch I just sent for group_by_target [I'm about to head to bed; just wanted to see if that was the sane approach]07:44
davidc__w/win 1207:44
lekerneldavidc__, looks good08:09
lekerneli.e. it really should return ({A, B}, [statement1, statement2, statement3]) in that case08:09
lekerneldo you really need resort_statements?08:24
lekerneldavidc__, how about this? http://pastebin.com/9dwg1DVi08:31
lekernel+ remove enumerate()08:31
lekerneldavidc__, I checked that resort_statements does nothing after this modification, using the whole milkymist-ng codebase.08:45
GitHub164[migen] sbourdeauducq pushed 2 new commits to master: http://git.io/ESj9aA08:49
GitHub164migen/master 16ebe41 David Carne: fhdl/tools: BUGFIX: fix group_by_target grouping...08:49
GitHub164migen/master 939f01c Sebastien Bourdeauducq: fhdl/tools/group_by_target: remove resort_statements08:49
ysionneaugood to see a lot of contributions those days :)08:52
lekernelinterestingly enough, this patch seems to send the ISE *router* into an infinite loop09:03
lekernelah no, just super slow and fails timing09:04
lekerneland the design and several simulations still work so I guess I can just blame it on ISE's shittiness09:05
ysionneauchange the random seed and jump on one foot around the computer09:07
GitHub23[migen] sbourdeauducq pushed 1 new commit to master: http://git.io/mokXlg10:13
GitHub23migen/master 9190568 David Carne: genlib/fifo/AsyncFIFO: fix data corruption bug10:13
lekernelyay, 1080p output works without a glitch on LASMI11:03
GitHub110[misp] sbourdeauducq pushed 1 new commit to master: http://git.io/cQ6PXw11:08
GitHub110misp/master a26b627 Sebastien Bourdeauducq: sync with milkymist-ng11:08
GitHub164[milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/zr8mww11:11
GitHub164milkymist-ng/master 525c329 Sebastien Bourdeauducq: software/memtest: fix bandwidth computation11:11
GitHub9[milkymist-ng] sbourdeauducq pushed 3 new commits to master: http://git.io/vbszTA12:01
GitHub9milkymist-ng/master fb06d80 Florent Kermarrec: s6ddrphy: revert CAS LATENCY 3 (configurable CAS Latency was buggy)12:01
GitHub9milkymist-ng/master da2b7aa Sebastien Bourdeauducq: cif: fix indentation12:01
GitHub9milkymist-ng/master ea65aaa Sebastien Bourdeauducq: s6ddrphy: cleanup12:01
davidc__lekernel: IIRC that simpler sorting code doesn't work in all cases14:38
azonenberglekernel: 1080p video using what interface?14:38
azonenbergthat hacked-up QDR setup on spartan6?14:39
davidc__lekernel: for example ({A}, stmt1), ({B}, stmt2), ({A}, stmt3), ({B}, stmt4), ({A, B}, stmt5)14:39
lekernelazonenberg, VGA14:39
azonenberglekernel: oh, lol14:39
azonenbergSo parallel 24-bit data to a DAC?14:39
davidc__lekernel: without the explicit sort that would result in stmt1, stmt3, stmt2, stmt4, stmt514:39
davidc__lekernel: I have a bit different coding style [which is perhaps invalid in migen] so I think I trigger it :)14:40
lekerneldo you have examples of that coding style?14:41
lekernelcurious :)14:41
davidc__lekernel: sure self.sync += foo.eq(foo_next); self.comb += foo_next.eq(foo); (...deep in fsm act statement....) foo_next.eq(bar)14:42
lekernelthat sounds ok14:42
davidc__lekernel: if you don't include the explicit reorder and the statements are in the seq described above; that fails :)14:43
davidc__Let me just make sure though with my failing code.14:43
lekernelah yes14:44
davidc__Ironically enough now of course I can't replicate my testcases failing without the resort :)14:49
davidc__But I think the resort is correct; no?14:49
lekernelit is correct, it just looks a bit heavy-handed14:50
GitHub161[migen] sbourdeauducq pushed 2 new commits to master: http://git.io/OOVfnw14:53
GitHub161migen/master d5d2e64 Sebastien Bourdeauducq: Revert "fhdl/tools/group_by_target: remove resort_statements"...14:53
GitHub161migen/master 411e6ec Sebastien Bourdeauducq: fhdl/tools: do not export resort_statements14:53
davidc__lekernel: yeah; I didn't see a nicer way :). If I think of one, you'll get a patch.14:54
davidc__lekernel: Also, for the SyncFIFO; there's no bypass between ports [there is on the same port]14:55
davidc__(er, on the S6, that is)14:55
lekernelyes, but that should be OK - there is the synchronizer latency after the first write14:55
lekernelwhich is > 2 cycles of the read clock, so the read port should always get clocked14:56
davidc__lekernel: for the AsyncFIFO; yes - I meant for tweaks to the SyncFIFO so it can be mapped to BRAMs14:57
lekernelbut iirc Xst adds some logic in that case14:57
lekernelthat compares the addresses and muxes the read data to a register containing the written data, using the fabric14:58
davidc__lekernel: perhaps. I'll poke at that tonight to see if I can get a large syncfifo into a BRAM. If not; adding the logic manually is easy enough14:59
lekernelyes. but Xst should even do that for you - which is preferable as it could be mapped to hard logic on architectures that might have it14:59
lekernelso I'd say try that first, and look at the manual logic only if there are bugs or other issues15:00
davidc__lekernel: btw - did XST/timing start working again after that patch? [I'd hate to think I broke ISE for you; I know how hard to placate it can be when it gets in one of its moods]15:09
lekernelon the M1 the timing issues have moved to the DVI clocks and are only off by a fraction of a nanosecond - still better than what the expansion board can really do15:13
lekernelthere are no problems on the mixxeo15:13
lekernelha actually it's fine now. not sure what I changed though.15:16
lekernelbut several daily ISE breakages is just business as usual anyway ....15:16
davidc__lekernel: heh; I did a 150mhz core clock design in an S3E... everything had to be LOCed by hand [down to the LUT, in some cases] to get it to consistently meet timing15:18
ysionneauurjtag git server is slow as hell19:53
ysionneau"remote: counting objects" takes forever19:54
ysionneauhum, urjtag does not compile on OSX20:02
Action: ysionneau is not surprised20:02
ysionneauhum, comment the line that does not compile, and it does20:03
ysionneauweird though20:03
larschopefully it will still work20:06
ysionneauyep, it was something about readline20:08
ysionneaucool I am able to send fjmem.bit to the Spartan 6 on the M1 via urjtag on OSX20:10
--- Thu Jul 18 201300:00

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