#milkymist IRC log for Monday, 2013-05-06

GitHub177[milkymist-ng] sbourdeauducq pushed 3 new commits to master: http://git.io/Xn3ZnA08:00
GitHub177milkymist-ng/master 679d13c Sebastien Bourdeauducq: another attempt at fixing clock routing issues08:00
GitHub177milkymist-ng/master f82a16f Sebastien Bourdeauducq: software/videomixer: send to framebuffer08:00
GitHub177milkymist-ng/master e2d15b1 Sebastien Bourdeauducq: dvisampler: mostly working, very basic and slightly buggy DMA08:00
Fallenou_oh, nice patch bhamilton :)10:00
Fallenou_good to see Milkymist SoC being ported to more and more boards/FPGA10:01
bhamiltonthanks. I'm playing around with partial reconfiguration, so needed a board with a v6 instead of s610:02
Fallenou_how fast is the system clock on Virtex 6 FPGA ?10:02
Fallenou_200 MHz ?10:02
bhamiltonyeah, 200MHz differential10:02
Fallenou_the whole SoC is clocked at 200 MHz?10:03
Fallenou_or you divide the clock using DCM/PLL10:03
bhamiltonI have built a SoC with just simple lm32 (same config as milkymist-ng), and it will not run above 140MHz. I am currently using MCM_ADV primitive to generate 100MHz clock for the SoC10:04
stekernwhat's the most critical path in lm32?10:06
Fallenou_140 is better than 88 MHz anyway :)10:06
Fallenou_happy hacking!10:06
Fallenou_gotta run10:07
bhamiltonMultiplier DSP48 blocks in lm32 cpu cause the contraint10:09
bhamiltonI have not tried any optimization etc., just standard options compiling with xst10:10
lekernelanyone has experience with ordering from mouser germany?10:19
lekernelfarnell germany (unlike farnell france and sweden) is horrible, they ignore emails and phone calls, ask for stupid paperwork that they lose, ship improperly packaged parts resulting in bent pins, they forget to ship some items, etc.10:21
lekerneland that was only with 2 simple orders10:21
lekernellast 2 I hops10:21
lekernelthere are still one (paid) item from my october 24 order I have not received, 2 emails and 1 phone calls about it ignored, I guess I'll give up on that one ...10:23
lekernelmy first order was also a mess, but since I had good experience with farnell fr/se I gave them another chance... should not have10:24
bhamiltonAre there any thoughts on hooking up migen documentation to be automatically built and hosted by something like readthedocs.org ?10:53
lekernelyou can do it10:59
lekernelah it needs a hook11:00
bhamiltonyeah, just a simple hook in the github repo11:00
bhamiltonawesome, thanks. It will help to have an online source with latest doc :)11:05
lekernelthe current doc isn't 100% up to date...11:05
bhamiltonI am going to write up my progress at creating SoC with migen and put it online, hopefully might be useful to someone learning migen as an example. I have used the milkymist-ng design heavily11:12
lekernel+# CPU reset switch12:17
lekernel+("cpu_reset", 0, Pins("H10"), IOStandard("SSTL15")),12:17
lekernelSSTL15 for a switch? funny...12:17
lekernelbhamilton, do you confirm that?12:17
larscI can confirm that12:18
lekernelah, I see, they put in on the DDR3 bank12:21
GitHub14[mibuild] sbourdeauducq pushed 2 new commits to master: http://git.io/DXmWJw12:23
GitHub14mibuild/master e4b0e8e Sebastien Bourdeauducq: xilinx_ise: enable register balancing12:23
GitHub14mibuild/master 3d08944 Brandon Hamilton: mibuild: Add platform for Xilinx ML605 board12:23
--- Tue May 7 201300:00

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