#milkymist IRC log for Friday, 2013-03-22

azonenbergfpga_editor is terrible02:14
azonenbergplanahead actually makes decent UIs02:14
azonenberghas*02:14
azonenbergI just wish it had an option to show routing rather than just placement02:15
azonenberglarsc: ooh02:15
azonenbergvery nice02:15
_florent_Hi11:38
_florent_miscope seems to work:11:38
_florent_from https://github.com/Florent-Kermarrec/miscope/blob/master/examples/de0_nano/top.py11:39
_florent_and https://github.com/Florent-Kermarrec/miscope/blob/master/examples/de0_nano/client/test_mila.py11:39
_florent_I get that http://www.enjoy-digital.fr/open_hardware/3/miscope_22032013.png11:39
_florent_;)11:39
_florent_now I'm going to try implementing rle...11:42
larsccool stuff11:46
_florent_thanks, now I will be able to debug the hdmi on the kc705 design ;)11:54
lekernel_florent_, posted it on the Milkymist twitter12:26
Fallenou:)12:44
GitHub169[migen] sbourdeauducq pushed 2 new commits to master: http://git.io/XV46Hw17:20
GitHub169migen/master ca431fc Sebastien Bourdeauducq: fhdl/module: support clock domain remapping of submodules17:20
GitHub169migen/master 9d7c679 Sebastien Bourdeauducq: genlib/fifo: simple synchronous FIFO17:20
Action: larsc implemented a generic synchronous fifo actor yesterday17:21
lekernelcommit early, commit often... I did check github before writing this17:35
larscyours is more feature complete anyway, I didn't know about the memory api17:38
GitHub194[milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/VD75Eg17:38
GitHub194milkymist-ng/master d65941d Sebastien Bourdeauducq: dvisampler: channel synchronization17:38
lekernelheh, it's documented even17:39
larsclike I read the documentation ;)17:39
lekerneldid I miss out something or the mess in fig. 3-6 of http://www.cs.unc.edu/Research/stc/FAQs/Video/dvi_spec-V1_0.pdf17:42
lekernelcan be replaced with Q0 = D0 XOR D9, Q1 = D1 XOR D0 XOR ~D8, Q2 = D2 XOR D1 XOR ~D8, etc.17:43
lekernel(the right part)17:43
larscyou mean the if/else part?17:45
lekernelall that goes after "Active Data? -> TRUE"17:45
larsc~a xor ~b == a xor b and a xnor b == a xor b xor 1, so I guess yes17:47
kay2When we have a .NGR  file, what simulator could be used against it ? only XILINX products ? basically I'd like to access it via python. is there a way for that ?18:45
lekernelyou can put the ngc (not ngr) into netgen and get a verilog netlist18:47
GitHub55[milkymist-ng] sbourdeauducq pushed 2 new commits to master: http://git.io/G5BOpQ22:51
GitHub55milkymist-ng/master 0376258 Sebastien Bourdeauducq: dvisampler: decoding22:51
GitHub55milkymist-ng/master 34b8388 Sebastien Bourdeauducq: dvisampler: decode before channel sync22:51
--- Sat Mar 23 201300:00

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