#milkymist IRC log for Sunday, 2013-03-10

--- Sun Mar 10 201300:00
Fallenouupstream binutils should now support lm32-MMU CSR registers as well as CFG2 CSR register12:19
Fallenoushould be included in 2.23.212:20
Fallenouin a few hundred years it should be included in debian stable :)12:20
larscnice12:23
lekernelanyone going to http://www.ohwr.org/projects/ohr-meta/wiki/OHW2013 ?12:25
larsclekernel: do you have something generic in migen which does data width conversion between two data streams. E.g. lets say you have a 64bit DMA bus which is connected to a core which internally works with 16bit samples.13:55
lekernelthere's limited support for that in the dataflow libs13:57
larscok, cause that's something I often see when streaming data is processed. But most of the time the width on both sides is hardcoded. So the core only works with a very specific upstream data source.13:59
lekernelwell, I didn't code all possible cases13:59
lekernelpull requests accepted14:00
larschehe14:00
larscWould I'd like to see is something that just does the right thing. Give it two datastreams and it will insert a small fifo and take care of up and down conversion of the bus width.14:01
larscand if the bus width's are equal it should turn into a noop14:02
lekernelit should be quite straightforward to do that with migen...14:02
lekerneldealing with various control signaling issues at both ends can be a bit messy though14:03
lekernelbut you can do a simple core that has just stb+ack, then other cores would hook that up to bus signals possibly with some glue logic14:04
larscok, thanks14:08
larscI want to see if I can use migen to implement some simple audio cores14:09
larscwhat does the 'specials' API do?16:00
lekernelit's for supporting features that cannot be expressed with 0/1 combinatorial and synchronous statements: tristates, block RAMs, instances16:05
larscok16:06
balrogxiangfu: I just found out about fpgatools; pretty nice :)16:20
balrogI recently found that someone posted debit back on github after it was gone from the internet for a while... https://code.google.com/p/debit/16:20
lekernelis there anything that debit has and fpgatools doesn't?16:22
balrogat this point I'm not sure... I just learned about fpgatools16:23
balroghow much do different size fpgas within a series differ?16:24
FallenouFYI Milkymist RTEMS drivers have been quoted/used in latest issue of "Open Silicium" French hack magazine by Pierre Ficheux16:25
Fallenoufor a mini2440 arm bsp16:26
lekernelFallenou, interesting - what did he say?16:26
Fallenouwell he just said "look, there is a nice example of GPIO/led driver in Milkymist BSP, let's take it and use it for our BSP"16:26
lekernelyay, let's port stuff from MM to ARM :)16:27
Fallenou;)16:27
Fallenouhe put milkymist website and such in the credit area16:27
Fallenoulike a gentleman16:27
FallenouI met him a few weeks ago at Paris Embedded #216:27
Fallenouand he told me "oh I used your driver for some mini2440 stuff !"16:27
FallenouI was kind of surprised :p16:27
Fallenouit was nice to meet him (for the first time) anyway16:28
lekernelwe should get more articles into OS16:28
Fallenouthe same day I met Christophe Blaess :)16:28
Fallenoufor the first time as well16:28
Fallenouyep16:28
Fallenouthere is an article about OpenRISC in latest OS16:29
lekernelthe editor in chief is actually a bit desperate about receiving too many raspberry pi type of things, haha16:29
Fallenouoh, Denis did himself the article writting about OpenRISC16:30
FallenouI thought it would have been at least an OpenRISC dev  guy16:30
lekernelwell if someone wants to translate the migen tuto into French... I'm quite sure it would work16:31
Fallenouwow, there is also an article about Raspberry Pi ... by Yann Guidon o_o16:31
Fallenouwtf16:31
lekernelI know... I have already sent him my comments :)16:32
Fallenouoh my, 2 articles about RPI actually16:32
FallenouWhen NetBSD will boot on the M1 I will send Denis an article :)16:33
lekernelrpi is also what most of the berlin startupers call "hardware"16:35
lekernelthere is <1% interesting people in this community - eg at last hackathon, two women put together a Michelson interferometer. it didn't make it into the top5 most liked projects among the websites and iOS apps, though.16:39
Fallenou...16:40
Fallenouso sad16:40
balrog:(16:42
larsclekernel: and 'serious hardware hacking' is making a LED blink on the rpi?16:42
balroglekernel: is this where most talk about "serious hardware hacking" takes place? or are there other channels around here for that? :)16:42
balrog(I mean with regards to people like you)16:42
Fallenouthere is qi-hardware , homecmos and such16:44
Fallenouand ##vhdl I guess16:44
azonenberghttp://i.imgur.com/eLcZsvy.png :D16:45
azonenbergMy cluster is coming online :)16:45
Fallenou##fpga16:45
azonenbergneed another dozen jtag cables before the rest of the nodes will be usable though :p16:45
lekernelazonenberg, what is that supposed to do in the end?16:45
Fallenoua cluster of what kind of board ?16:45
azonenbergFallenou: very heterogeneous16:46
azonenbergeverything from an XC3S50A on a homemade board to the Atlys16:46
azonenbergTwo of them in fact16:46
azonenbergI'm using it for unit tests of my thesis research and libjtaghal16:46
Fallenouit's running your "network" kind of SoC ?16:46
lekernelbalrog, #opencores too, maybe16:46
azonenbergFallenou: The bigger boards are being used as testbeds for that, yes16:47
azonenbergthe smaller ones are for one-off prototyping and libjtaghal regression testing16:47
azonenbergand just for good measure as long as i was bringing up a batch scheduler i set up distributed builds16:47
azonenbergi can't make one P&R run go any faster, but a lot of cores will trivially speed up building ten bitstreams at once16:47
lekernelazonenberg, well you can, thanks to wolfspraul's fpgatools and some coding ;)16:48
azonenberglekernel: I dont think it's mature enough for that16:48
lekernelis there a timing model btw?16:48
azonenbergthe CPLD boards, however, are being used for active development of my CPLD toolchain16:48
azonenbergFor his or mine?16:48
lekerneleither16:49
balrogI've also bee wondering a bit if anyone has been doing any research on altera chips16:49
azonenbergI intend to do full timing analysis on mine16:49
azonenbergnot yet implemented16:49
balrogmost of the free tools so far target xilinx16:49
azonenbergI'm still working at the bitstream level16:49
azonenbergbalrog: how many others are there?16:49
azonenbergbesides my CPLD stuff and fpgatools16:49
balrogdebit, the stuff in lekernel's presentation from 201116:49
azonenbergdebit was mostly RE focused though right?>16:50
azonenbergnot aiming at synthesis16:50
lekernelwell neither is completed... fpgatools is the best tool you can have today imo16:50
balrogyeah... I'm mostly interested in RE but synthesis is useful too16:50
balrogand there are at least four major FPGA companies; xilinx, altera, actel, and lattice16:50
azonenbergI want both16:50
azonenbergfpgatools is your best hope, ye16:50
azonenbergyes*16:50
azonenbergmy CPLD stuff is mostly a side project that i think is small enough compared to fpgatools that it can become production-ready relatively quickly16:50
azonenbergwhereas fpgatools needs a LOT of work still16:50
balrogCPLDs are much simpler too16:50
azonenbergThat was the point16:51
azonenbergit's tractable for one person to do in a few months16:51
balrogany of you played with PALs? :)16:51
azonenbergAnother week or so of effort should be enough to get the full bitstream format worked out16:51
lekernelazonenberg, what are the next major obstacles, except the timing model?16:51
azonenbergthen the place-and-route for a CPLD is pretty easy since the netlists are so small16:51
balrogwhich CPLD series?16:51
azonenbergcoolrunner-II16:51
lekernelfor fpgatools16:51
azonenbergoh16:51
azonenbergI havent been following him too closely16:51
azonenbergbeen playing my own game here16:51
balrogthe XC9500XL series seems useful16:51
azonenbergthere is no shared code since the architectures are so different16:52
azonenbergbalrog: i'm focusing on cr-ii because of one crucial detail16:52
azonenbergthe .jed files generated by the xilinx compilers include comments16:52
azonenbergdescribing most of the bitstream format16:52
balrogaaah hah16:52
azonenbergi suspect someone left _DEBUG defined16:52
azonenbergby accident16:52
balrogLOL16:52
balrogXC9500XL is still xilinx16:52
azonenbergBut i'm not gonna look a gift horse in the mouth16:52
balrogand the jed files for those don't include comments?16:52
azonenbergCorrect16:52
balrog:/16:52
azonenbergfrom what i understand cr-ii was based on another company xilinx acquired16:53
azonenbergthis may be their code16:53
lekernelwhat are fun things to do with CPLDs?16:53
balrogthere's no way to tweak things to leave _DEBUG defined?16:53
balroglekernel: FPGA type but smaller. you don't have to load microcode either16:53
azonenbergIf it's done at the preprocessor level, no16:53
azonenberglekernel: mainly 74xx replacement16:53
balrogPAL replacement too16:53
azonenbergthey're nonovolatile, small, and cheap16:53
balrogyep16:53
azonenbergi'd rather throw an xc2c32a on a board than two or three 74HC's16:53
azonenbergone 74HC i might do but even then i might prefer the cpld for flexibility16:54
balrogfor that small you might be better off with PALs; too bad only Atmel still makes them16:54
lekernelsure, but what full project can you do, in practice?16:54
azonenberglekernel: Maybe a SERDES for a microcontroller?16:54
balroghttp://www.bigmessowires.com/2012/12/15/build-your-own-floppy-emu/ uses an XC9500XL series16:54
azonenbergThey're not meant to be full systems16:54
azonenbergthey're meant for glue logic16:54
balrogyep16:54
Fallenouthey must be damn cheap to be used for glue logic17:00
azonenbergFallenou: $1.15 for the xc2c32a17:01
azonenbergin the slow speed grade17:01
azonenberg32 flipflops and 32 macrocells worth of combinational logic17:01
Fallenouhum still "expensive" for mass prod17:01
Fallenoubut not that much17:01
Fallenouand definetly not expensive for a small hobbyist project17:01
Fallenoudo they exist in DIP like packages ?17:02
Fallenouor only in surface mount packages17:02
Fallenouoh it seems so17:03
Fallenouhttp://www.digikey.com/product-search/en/integrated-circuits-ics/embedded-cplds-complex-programmable-logic-devices/2556261?stock=1&pv69=8017:03
Fallenouat least atmel cpld17:03
Action: Fallenou chasing after \302 and \240 invisible characters in his code ...17:28
Fallenoucannot locate it using od -c17:28
Fallenou/Users/fallen/dev/netbsd/src/sys/kern/kern_idle.c:68:2: error: stray '\302' in program17:28
Fallenougrrr17:28
Fallenouok found 'em using mac os textedit =)17:32
Fallenouok now let's have fun implementing locking functions for lm32 ...17:35
lekernelhave you tried sublime text?17:36
Fallenounot yet17:36
Fallenoumy coworkers are using it17:36
Fallenouit seems nice !17:36
lekernelconfigure.ac:96: error: 'AM_CONFIG_HEADER': this macro is obsolete.17:39
lekernel    You should use the 'AC_CONFIG_HEADERS' macro instead.17:39
lekernelinstalling urjtag on arch linux is a lot of fun!17:39
lekernel2003-03-13  Marcel Telka  <marcel@telka.sk>17:42
lekernel    * configure.ac (AC_CONFIG_HEADERS): Replaced this `new' macro ...17:42
lekernel    (AM_CONFIG_HEADER): ... with this `old' one to make build compatible with automake-1.6.17:42
lekernelbut they still don't get it: gnu/autocrap sucks.17:42
Fallenou....17:42
Fallenouthe most annoying thing about auto**$ is the bloody compatibility issue17:43
Fallenoubetween am and ac versions17:43
Fallenouthat's crazy how they seem to break things between versions17:43
lekernelah, it gets worse: http://momentarypause.blogspot.de/2006/02/acconfigheaders-vs-amconfigheaders.html17:43
lekernelAutoconf and automake have a config file which is built out of macros. Two of those macros are AC_CONFIG_HEADERS and AM_CONFIG_HEADERS. Now, here's the fun part. To use autoconf, you need to use the former. To use automake, you need to use the later. Either tool will barf processing the config file if the other is present17:44
Fallenou:)17:45
Fallenousolution : update your am and ac17:45
Fallenouto use labels like 1b / 1f (meaning first backward encountered 1: label / first forward encountered 1: label) on the same line as the branch instruction, I need to use "1b", right?17:59
Fallenoulike:17:59
Fallenou1: bne r0, r1, 1b17:59
Fallenou(this is GNU AS specific I guess)18:00
larsc1b should be correct18:05
larscyou could also write 'bne r0, r1 .' I guess18:05
Fallenouhum I guess yes18:05
Fallenouthanks18:05
larsclekernel: I want to invert a signal, should 'a.eq(not b)' work?18:09
larscah18:09
larsca.eq(~b)18:09
Fallenou./lm32/lock.h: Assembler messages:18:11
Fallenou./lm32/lock.h:87: Error: unrecognized keyword/register name `be r0,(r11+0),1f'18:11
FallenouGNU AS is unhappy about 1f I guess :)18:11
larscyou can only compare registers18:11
Fallenousuper strange since two lines after that I have "1:"18:11
Fallenouoh right, indeed18:12
Fallenougcc generated wrong code18:12
FallenouI put be r0,%1,1f18:12
larscyou need the "r" constraint18:12
Fallenouyep I put "=m" I just replaced by m18:12
Fallenouerr by "r"18:12
Fallenougreat, locking is OK18:14
Fallenouthanks larsc :)18:15
larscmeh, now that I have some questions lekernel is gone18:20
larscas if knew ;)18:20
Fallenouhehe18:27
Fallenoularsc: is the adv linux driver release we talked about delayed?18:29
GitHub155[migen] sbourdeauducq pushed 12 new commits to master: http://git.io/uQUnyw18:30
GitHub155migen/master 2b8dc52 Sebastien Bourdeauducq: Use common definition for FinalizeError18:30
GitHub155migen/master 6da8eb9 Sebastien Bourdeauducq: fhdl/autofragment: empty build_fragment by default18:30
GitHub155migen/master f53acb9 Sebastien Bourdeauducq: fhdl/autofragment: fix submodules18:30
Fallenouthis time he really is avoiding you, he left and is still pushing! :p18:30
larscFallenou: the driver is here, just forgot to tell you: https://github.com/analogdevicesinc/linux/tree/adv7611_for_xilinx18:32
Fallenouoh ok, I was monitoring this page: http://wiki.analog.com/resources/tools-software/linux-drivers-all18:33
Fallenouthanks :)18:33
larscyea, I still need to write the documentation18:33
larscso much stuff going on atm18:33
larscsuper busy18:33
FallenouI can understand ;)18:33
Fallenouoh, so it's a Xilinx demand, the driver ?18:33
larscXilinx needs it for one of their designs, but other customers have asked for it as well18:34
GitHub57[milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/C4B3OA18:34
GitHub57milkymist-ng/master a9b7235 Sebastien Bourdeauducq: Use new module, autoreg and eventmanager Migen APIs18:34
larscnot related to the adv, but to being super busy. It takes 1-2 years to develop a new IC, but they only realize two weeks before shipping it that they need a Linux driver as well18:36
Fallenoularsc: that's a pitty =(18:38
Fallenouanyway, thanks for the link, I will forward this to our kernel team so that they can compare their driver with your :)18:39
FallenouI hope this will apply easily, since we are using 2.6.35 kernel tree18:39
larscoh18:39
larscthat's ancient18:39
FallenouAndroid 2.3 Texas Instrument release :)18:40
larscso this is 3.6 and I already had to backport a few things18:40
Fallenouwo18:40
FallenouBut I guess we will use a more up to date kernel for the HDMI board18:40
Fallenouat least 3.*18:40
larscok18:40
larscIt is almost frightening how easy some thigns are with migen18:47
GitHub156[migen] sbourdeauducq pushed 1 new commit to master: http://git.io/BnmEpQ18:48
GitHub156migen/master b042757 Sebastien Bourdeauducq: Fix Register name conflict between Pytholite and Bank18:48
Fallenoularsc: this sentence could be written on the migen front page as a "review" from a well known newspaper18:50
Fallenouor like movie reviews at the beginning of the trailer18:50
larscThis http://pastebin.com/Z3fXZEA2 gives me this http://metafoo.de/i2s.png20:09
--- Mon Mar 11 201300:00

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