#milkymist IRC log for Tuesday, 2013-02-26

larscmore Xilinx madness, I think I'll join the haters club. I tried to use their Linux driver for SPI on zynq today. Which of course didn't work at all, but after some fixing I got it to a point where it would only fail sometimes.11:52
larsclike 1 in 5 SPI transfers wouldn't start11:52
larscyou start a SPI transfer by writing a 1 to a register, repeating that line 5 times makes the issue go away11:52
larscSo I read through the datasheet and found this: 'The SPI reference clock (spi_ref_clk) must be set to a higher frequency than the CPU_1x clock11:53
larscspi_ref_clk was 100MHz and CPU_1x was 133MHz, so this explains why the edge is lost sometimes11:53
larscBut turns out the Xilinx tools don't allow you to set a higher frequency for SPI core than 100MHz...11:54
larscManually overwriting the clock register, so the core is clocked at 200MHz also fixes the issue11:54
lekernellarsc, use lm32 :)13:52
lekernelyou can run it at 200MHz on kintex 713:53
larsccan't really compete with a dual core ARM with 1300 MIPS each, so that's not really an option14:00
larscjust got a call from one of their support guys, 'yeay, known issue, but we didn't bother to make the AR public'...14:00
larscbut at least it will be fixed in 14.514:01
larsclekernel: It would be interesting to see though how well the lm32 would compare to the microblaze in our designs for non-zynq platforms14:10
lekernelalready ran mibench on milkymist/lm32 vs. edk/microblaze, similar clock frequency and caches. milkymist is some 20% faster.14:11
larscnot bad14:14
larscfor some reason we seem to the microblaze on 100MHz even on K714:16
larscdas hackerhaus ist das schon viel besser17:59
larscwrong channel18:05
mwalleFallenou: could you send a patch for the CFG2 CSR to the binutils ml ?18:54
sb0and I think for the other MMU CSRs too, if they are definitive?19:29
Fallenoumwalle: OK will do it19:31
Fallenoudo you have the mailing list address ?19:32
Fallenouhttp://sourceware.org/ml/binutils/ ?19:32
mwallebug-binutils@gnu.org i guess19:45
mwallemh no binutils@sourceware.org with some kind of [Patch] tag in the subject19:46
Fallenouhum ok19:46
Fallenouok thanks19:46
GitHub120[linux-milkymist] larsclausen pushed 15 new commits to master: http://git.io/tSAniQ19:57
GitHub120linux-milkymist/master 64d30a6 Lars-Peter Clausen: lm32: Get rid of pm_idle...19:57
GitHub120linux-milkymist/master b533446 Lars-Peter Clausen: lm32: Use _save_altstack helper...19:57
GitHub120linux-milkymist/master a94271a Lars-Peter Clausen: lm32: switch to generic sys_sigaltstack...19:57
Fallenoushouldn't we let icache/dcache/itlb/dtlb sizes accessible from the software ?19:59
Fallenouin a register, somewhere ?19:59
Fallenouwell maybe i/d cache sizes (and cache line size) are not so important for the software/kernel20:00
Fallenoubut i/d tlb sizes is important20:01
mwallelarsc: cool cleanups :)20:56
mwalleFallenou: imho compile time configs or dtb properties are sufficient21:01
mwallei dont know if its worth to spend a csr for it21:03
larscmwalle: yea, most of the theobroma madness is now gone, signal handling still needs a cleanup though22:15
--- Wed Feb 27 201300:00

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