#milkymist IRC log for Sunday, 2013-02-24

GitHub121[mibuild] sbourdeauducq pushed 1 new commit to master: http://git.io/y76JJw11:07
GitHub121mibuild/master d60ab1d Sebastien Bourdeauducq: Use new 'specials' API11:07
GitHub17[milkymist-ng] sbourdeauducq pushed 2 new commits to master: http://git.io/eatXsA11:54
GitHub17milkymist-ng/master a22ada3 Sebastien Bourdeauducq: corelogic -> genlib11:54
GitHub17milkymist-ng/master 0caac22 Sebastien Bourdeauducq: Use new 'specials' API11:54
GitHub139[migen] sbourdeauducq pushed 1 new commit to master: http://git.io/sGsrNQ11:54
GitHub139migen/master 55ab01f Sebastien Bourdeauducq: fhdl/specials/Instance: _printintbool -> verilog_printexpr11:54
GitHub183[mibuild] sbourdeauducq pushed 1 new commit to master: http://git.io/8fME-g14:47
GitHub183mibuild/master 2b902fd Sebastien Bourdeauducq: xilinx_ise: import Instance14:47
lekernelFallenou, seems the CFG2 CSR is missing from your binutils14:53
GitHub0[milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/GOgN-A15:08
GitHub0milkymist-ng/master 43343b1 Sebastien Bourdeauducq: lm32: use submodule15:08
larscha, found another way to store away the clobbered registers without clobbering the userspace stack. Load the address of the memory where we are going to store them into r0, and reset r0 to 0 after the registers are saved.15:28
lekernelyeah, the debugger rom does that15:30
GitHub155[milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/Mj3i8Q15:39
GitHub155milkymist-ng/master b854f1a Sebastien Bourdeauducq: build: support optional MMU15:39
Fallenoulekernel : oh, I will have a look at that, thanks15:39
mwallehi15:48
lekernelhi15:49
GitHub187[milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/ifolPw16:01
GitHub187milkymist-ng/master 5e6505b Sebastien Bourdeauducq: bios: print number of memory errors16:01
lekernelinteresting. switching DDR clock I/O standard from SSTL2_I to SSTL2_II has reduced the number of errors from 50k-80k to 100-20016:10
lekernelon a 4MB buffer16:10
GitHub108[lm32] mwalle pushed 1 new commit to master: http://git.io/Arq4WA16:14
GitHub108lm32/master cf2281b Michael Walle: fix compilation with no CFG_DEBUG_ENABLED...16:14
mwallelekernel: isnt dd if=infile of=outfile conv=swab the same as your "byteswap" tool?16:22
lekernelhmm, should be :)16:23
mwalle"software: go back to GCC" << huh?16:24
lekernelgrmbl. swapping PLL outputs that are otherwise configured exactly the same makes the SDRAM bug appear and disappear.16:33
lekernelI hate xilinx16:33
wpwrakmeanwhile, at xilinx HQ, champagne is flowing. CEO announces that the company's secret long-term objective has been met: they have officially earned sebastien's hatred. stock soars.16:47
GitHub5[milkymist-ng] sbourdeauducq pushed 2 new commits to master: http://git.io/7ya44g16:53
GitHub5milkymist-ng/master 70f4c74 Sebastien Bourdeauducq: m1crg: advance off-chip DDR clock phase16:53
GitHub5milkymist-ng/master 356416f Sebastien Bourdeauducq: lm32: update16:53
lekernelnow I wonder if it's sill going to work on r1 boards...16:53
lekerneleither way, my board's dram is ready to receive sampled hdmi frames ;)16:54
lekernelmwalle, byteswap != dd conv=swab. byteswap also reverses the bits in the 16-bit words.17:00
lekernelAFAIR this is a xilinx configuration oddity, not a minor M1 PCB mess-up...17:01
larscwpwrak: if that's their secrect plan it may explain a few things ;)21:36
wpwrak;-))21:57
wpwrakall the design decisions suddenly make sense :)21:57
GitHub25[lm32-binutils-mmu] fallen pushed 1 new commit to master: http://git.io/JSwpCQ23:18
GitHub25lm32-binutils-mmu/master cd0bade Yann Sionneau: lm32: Add support for CFG2 CSR register23:18
Fallenouif you re-arrange the short SHA-1 you get: c0de bad :-(23:22
Fallenoutoo bad!23:22
Fallenougn8!23:22
--- Mon Feb 25 201300:00

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