| --- Sun Dec 16 2012 | 00:00 | |
| lekernel__ | kristianpaul: yeah let's change the cr/lf, since you insist... | 15:20 |
|---|---|---|
| kristianpaul | larsc: have a patch ! :-) | 15:21 |
| kristianpaul | i insist a lot yup :-) | 15:21 |
| lekernel__ | kristianpaul: what feature do you need which is in legacy soc and not yet in ng? | 15:21 |
| kristianpaul | cause my workaround was a ugly hack to flterm ;) | 15:21 |
| kristianpaul | lekernel__: verilog code i can barely understand | 15:22 |
| kristianpaul | i have programed little mcus in the past and i love the idea of the lm32 soc a simple one | 15:22 |
| lekernel__ | building small lm32 socs is possible with migen too... | 15:23 |
| kristianpaul | so i dont see in my self and inmediate need to add more higher descriptions languages | 15:23 |
| lekernel__ | in fact you have more customization options | 15:23 |
| kristianpaul | but that create overhead in other parts | 15:23 |
| lekernel__ | where? | 15:23 |
| kristianpaul | machine generated verilog :-) | 15:24 |
| lekernel__ | is there any linux distro where python isn't installed by default? | 15:24 |
| kristianpaul | i think thats not the point, but dunno it seems to be verywhere | 15:24 |
| kristianpaul | point is | 15:24 |
| kristianpaul | i dont came here for the memory controller | 15:24 |
| lekernel__ | the only extra package is networkx, which you only need for dataflow - and I'm thinking about discontinuing its use | 15:24 |
| kristianpaul | or the effects | 15:24 |
| kristianpaul | well those are interesting | 15:25 |
| kristianpaul | i came here for the soc | 15:25 |
| kristianpaul | the basis | 15:25 |
| kristianpaul | so the lm32 soc you put together (including the CSR) was fine to me | 15:25 |
| lekernel__ | well, migen fhdl actually cleans up several verilog idiosyncrasies and gotchas | 15:26 |
| lekernel__ | even if the syntax is a bit ugly at times | 15:26 |
| kristianpaul | thats what i have with legacy soc and i dont see the inmediate need to move to -ng (no saying it have interesting features to play) | 15:26 |
| kristianpaul | yeah fhdl is nice, i mean try not use verilog it is | 15:26 |
| kristianpaul | i remenber you even wrote some intermediate llhdl etc.. | 15:26 |
| lekernel__ | nah, nothing to do | 15:27 |
| kristianpaul | but i will like to keep close to the hw | 15:27 |
| lekernel__ | fhdl -> verilog is direct | 15:27 |
| kristianpaul | the closest now is simple verilog | 15:27 |
| lekernel__ | fhdl only adds one abstraction that verilog does not: implied clock and reset | 15:27 |
| kristianpaul | not saying lm32 inside is not that simple, i havent checked | 15:27 |
| kristianpaul | and of course wspraul fgpa tools but thats foorplaning for now | 15:28 |
| lekernel__ | all the rest is already implemented in verilog, but implemented poorly sometimes (eg signed arithmetic) | 15:28 |
| kristianpaul | still interesting because is simple | 15:28 |
| lekernel__ | or reg vs. wire. this one is a complete waste of time. | 15:28 |
| kristianpaul | he eyah | 15:28 |
| kristianpaul | i hope you do understand my point | 15:28 |
| kristianpaul | i have nothing against -ng | 15:29 |
| kristianpaul | is cool | 15:29 |
| kristianpaul | but i dont think i need it | 15:29 |
| lekernel__ | so if you use FHDL you only have a Signal() object, and then the verilog converter will appropriately choose "reg" or "wire" for you | 15:29 |
| kristianpaul | yes yes | 15:29 |
| lekernel__ | and regarding hardware closeness, you can directly access the FPGA LUTs and other primitives from FHDL just as well | 15:30 |
| kristianpaul | yes sure | 15:30 |
| kristianpaul | i like you lm32 soc a lot | 15:31 |
| kristianpaul | thats why i sent the patch for adding one bit more to CSR | 15:31 |
| kristianpaul | i like mcus flat memory etc.. | 15:32 |
| lekernel__ | ng also has flat memory | 15:32 |
| kristianpaul | i dont think i need more features now | 15:32 |
| kristianpaul | yeap | 15:32 |
| kristianpaul | but i want a verilog code i can barely understand | 15:32 |
| kristianpaul | even tought xilinx tools mess and "optimize" and you look at the resulting netlist is something may be no be easy to observe | 15:33 |
| kristianpaul | for a human ;) | 15:33 |
| kristianpaul | but still the closest to fpga hw resources i think | 15:33 |
| kristianpaul | so is not a feature thing | 15:33 |
| kristianpaul | is a simplicity | 15:33 |
| kristianpaul | small tools | 15:34 |
| kristianpaul | etc | 15:34 |
| kristianpaul | i ejoy a lot when wpwrak wrotes its own small tools | 15:34 |
| kristianpaul | for small and fefined porpuses | 15:34 |
| kristianpaul | i like a soc like that | 15:34 |
| kristianpaul | not a new HDL | 15:34 |
| kristianpaul | thats something TBD... once more people code for fpga configurations bits then selfs etc.. | 15:35 |
| kristianpaul | okay need to go visit granmother :_) | 15:35 |
| kristianpaul | nice talk to you and thanks for the cf reconsiderations ! | 15:35 |
| lekernel__ | well, fhdl is arguably simpler than verilog | 15:36 |
| kristianpaul | ah | 15:36 |
| lekernel__ | and migen is merely a collection of small tools | 15:36 |
| kristianpaul | fhdl can generate and intermediate language to xilinx tools? | 15:37 |
| kristianpaul | i mean not verilog | 15:37 |
| lekernel__ | fhdl and verilog are about at the same abstraction layer... | 15:38 |
| kristianpaul | but you generate verilog at the end no? | 15:38 |
| lekernel__ | I convert to verilog merely for practical considerations | 15:38 |
| lekernel__ | you could certainly remove it and do some fhdl -> synthesizer IR or fhdl -> netlist directly | 15:39 |
| kristianpaul | this is your fhdl http://cs.ecs.baylor.edu/~maurer/help/fhdlsyn/ ? | 15:40 |
| kristianpaul | remove, yeah thats my feature ;-) | 15:40 |
| lekernel__ | but then you have no simulator, are bound to a particular fpga family, etc. | 15:40 |
| lekernel__ | ie it's a royal pain and generating verilog is a much better solution | 15:40 |
| lekernel__ | no | 15:41 |
| kristianpaul | ah no no reading fpgaworls slides yes i remenber now | 15:41 |
| kristianpaul | need to go.. | 15:42 |
| kristianpaul | bye | 15:42 |
| lekernel__ | bye! | 15:42 |
| wpwrak | lekernel__: jlime for the ben doesn't have python by default (nor perl for that matter) | 16:20 |
| lkcl_ | hi folks - does anyone have a mmone JTAG daughterboard made up, that i can either borrow or buy? as long as it's standard JTAG that is :) | 16:33 |
| lekernel__ | wpwrak: are you serious about running fpga synthesis on the ben? :) | 16:43 |
| lekernel__ | lkcl_: where do you live? | 16:43 |
| lekernel__ | wpwrak: though maybe wolfspraul's tools could handle small designs there... if the chip model fits in the RAM | 16:44 |
| lkcl_ | lekernel__: i'm in the UK. i'm debugging the 1st revision of the A10 EOMA68 CPU Card, i need a JTAG board, and i'd rather work with people who are in the free software community | 17:02 |
| Fallenou | is there really a Linux syscall to flush data or instruction cache ? | 17:22 |
| Fallenou | I'm not sure a userland application should have access to such low level stuff like "flush caches" | 17:24 |
| Fallenou | a syscall access to DCC ICC seems reasonable though | 17:24 |
| Fallenou | if such a syscall already exist in Linux I can see no point in not implementing it | 17:24 |
| Fallenou | mwalle: what's the difference between your mmu and mmu-cleanup branch ? | 18:39 |
| roh | lkcl_: i recommend anything similar to the moko develboard or the amontec ones | 21:15 |
| roh | atleast for arm based stuff.. works great with openocd | 21:15 |
| roh | http://www.amontec.com/jtagkey-tiny.shtml http://wiki.openmoko.org/wiki/Debug_Board_v2 or http://wiki.openmoko.org/wiki/Debug_Board_v3 | 21:18 |
| roh | lkcl_: maybe send this guy a nice mail: http://pulster.de/d__omdebug__OpenMoko_Debug_Board___GRATIS__985.htm | 21:21 |
| roh | he sells openmoko phones and sends out the debug boards for free with his moko orders on request | 21:21 |
| wpwrak | lekernel__: (synthesis) dunno :) just commented on your question whether there was any distribution that had no python by default | 22:15 |
| wpwrak | and i would indeed hope that more efficient synthesis tools would eventually result from wolfgang's effort. the incredible slowness of the closed tools is plain incomprehensible and an insult to human ingenuity | 22:16 |
| wpwrak | Fallenou: i'm not aware of any such syscalls. a syscall would seem somewhat heavy for this kind of tasks anyway. | 22:20 |
| Fallenou | wpwrak: ok, what would you think about allowing a user land application to play with ICC and DCC? It seems odd to me | 22:37 |
| Fallenou | user land should never have access to very low level stuff | 22:37 |
| wpwrak | there may be some use for being able to flush caches, e.g., to implement fast user-space interprocess communication | 22:46 |
| wpwrak | not sure how far other architectures let you go there | 22:48 |
| wpwrak | in general, flushing your caches should be a relatively harmless operation, considering that you could obtain the same effect by other means as well | 22:49 |
| Fallenou | yes | 22:58 |
| mwalle | Fallenou: mh the mmu-cleanup branch are cleanuped patches for milkymist | 23:02 |
| Fallenou | so the most up to date tree with all features and work in progress is "mmu" ? | 23:02 |
| mwalle | but i'm working on a lm32 module, i hope lekernel__ can be convinced to include the processor as a submodule | 23:02 |
| mwalle | Fallenou: the diff should be minimal, there are some additional cleanups on the mmu-cleanup branch, but there are more cleanups on the lm32 repo (not released yet) | 23:03 |
| Fallenou | I think if you submit a patch that makes the makefile do the git submodule update --init stuff etc automatically he would agree ;) | 23:03 |
| mwalle | but the mmu stuff is the same on mmu-cleanup and the upcoming lm32 module | 23:04 |
| Fallenou | ok | 23:05 |
| Fallenou | I will very soon try to catch up with what you've done recently | 23:05 |
| mwalle | the mmu branch is better for reading the history :) | 23:05 |
| Fallenou | ok great :) | 23:05 |
| mwalle | ah and i found a bug in the qemu lm32 emulation code :) | 23:06 |
| Fallenou | ohoh | 23:06 |
| Fallenou | it was hiding deeply in qemu codebase | 23:06 |
| Fallenou | nice | 23:06 |
| mwalle | cmpgeiu and cmpgiu may give the wrong result | 23:07 |
| mwalle | importing the qemu tests in the lm32 test bench worked surprisingly well ;) | 23:08 |
| Fallenou | :) | 23:11 |
| Fallenou | going to bed, gn8! | 23:11 |
| --- Mon Dec 17 2012 | 00:00 | |
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