#milkymist IRC log for Sunday, 2012-12-16

--- Sun Dec 16 201200:00
lekernel__kristianpaul: yeah let's change the cr/lf, since you insist...15:20
kristianpaullarsc: have a patch ! :-)15:21
kristianpauli insist a lot yup :-)15:21
lekernel__kristianpaul: what feature do you need which is in legacy soc and not yet in ng?15:21
kristianpaulcause my workaround was a ugly hack to flterm ;)15:21
kristianpaullekernel__: verilog code i can barely understand15:22
kristianpauli have programed little mcus in the past and i love the idea of the lm32 soc a simple one15:22
lekernel__building small lm32 socs is possible with migen too...15:23
kristianpaulso i dont see in my self and inmediate need to add more higher descriptions languages15:23
lekernel__in fact you have more customization options15:23
kristianpaulbut that create overhead in other parts15:23
lekernel__where?15:23
kristianpaulmachine generated verilog :-)15:24
lekernel__is there any linux distro where python isn't installed by default?15:24
kristianpauli think thats not the point, but dunno it seems to be verywhere15:24
kristianpaulpoint is15:24
kristianpauli dont came here for the memory controller15:24
lekernel__the only extra package is networkx, which you only need for dataflow - and I'm thinking about discontinuing its use15:24
kristianpaulor the effects15:24
kristianpaulwell those are interesting15:25
kristianpauli came here for the soc15:25
kristianpaulthe basis15:25
kristianpaulso the lm32 soc you put together (including the CSR) was fine to me15:25
lekernel__well, migen fhdl actually cleans up several verilog idiosyncrasies and gotchas15:26
lekernel__even if the syntax is a bit ugly at times15:26
kristianpaulthats what i have with legacy soc and i dont see the inmediate need to move to -ng (no saying it have interesting features to play)15:26
kristianpaulyeah fhdl is nice, i mean try not use verilog it is15:26
kristianpauli remenber you even wrote some intermediate llhdl etc..15:26
lekernel__nah, nothing to do15:27
kristianpaulbut i will like to keep close to the hw15:27
lekernel__fhdl -> verilog is direct15:27
kristianpaulthe closest now is simple verilog15:27
lekernel__fhdl only adds one abstraction that verilog does not: implied clock and reset15:27
kristianpaulnot saying lm32 inside is not that simple, i havent checked15:27
kristianpauland of course wspraul fgpa tools but thats foorplaning for now15:28
lekernel__all the rest is already implemented in verilog, but implemented poorly sometimes (eg signed arithmetic)15:28
kristianpaulstill interesting because is simple15:28
lekernel__or reg vs. wire. this one is a complete waste of time.15:28
kristianpaulhe eyah15:28
kristianpauli hope you do understand my point15:28
kristianpauli have nothing against -ng15:29
kristianpaulis cool15:29
kristianpaulbut i dont think i need it15:29
lekernel__so if you use FHDL you only have a Signal() object, and then the verilog converter will appropriately choose "reg" or "wire" for you15:29
kristianpaulyes yes15:29
lekernel__and regarding hardware closeness, you can directly access the FPGA LUTs and other primitives from FHDL just as well15:30
kristianpaulyes sure15:30
kristianpauli like you lm32 soc a lot15:31
kristianpaulthats why i sent the patch for adding one bit more to CSR15:31
kristianpauli like mcus flat memory etc..15:32
lekernel__ng also has flat memory15:32
kristianpauli dont think i need more features now15:32
kristianpaulyeap15:32
kristianpaulbut i want a verilog code i can barely understand15:32
kristianpauleven tought xilinx tools mess and "optimize" and you look at the resulting netlist is something may be no be easy to observe15:33
kristianpaulfor a human ;)15:33
kristianpaulbut still the closest to fpga hw resources i think15:33
kristianpaulso is not a feature thing15:33
kristianpaulis a simplicity15:33
kristianpaulsmall tools15:34
kristianpauletc15:34
kristianpauli ejoy a lot when wpwrak wrotes its own small tools15:34
kristianpaulfor small and fefined porpuses15:34
kristianpauli like a soc like that15:34
kristianpaulnot a new HDL15:34
kristianpaulthats something TBD... once more people code for fpga configurations bits then selfs etc..15:35
kristianpaulokay need to go visit granmother :_)15:35
kristianpaulnice talk to you and thanks for the cf reconsiderations !15:35
lekernel__well, fhdl is arguably simpler than verilog15:36
kristianpaulah15:36
lekernel__and migen is merely a collection of small tools15:36
kristianpaulfhdl can generate and intermediate language to xilinx tools?15:37
kristianpauli mean not verilog15:37
lekernel__fhdl and verilog are about at the same abstraction layer...15:38
kristianpaulbut you generate verilog at the end no?15:38
lekernel__I convert to verilog merely for practical considerations15:38
lekernel__you could certainly remove it and do some fhdl -> synthesizer IR or fhdl -> netlist directly15:39
kristianpaulthis is your fhdl http://cs.ecs.baylor.edu/~maurer/help/fhdlsyn/ ?15:40
kristianpaulremove, yeah thats my feature ;-)15:40
lekernel__but then you have no simulator, are bound to a particular fpga family, etc.15:40
lekernel__ie it's a royal pain and generating verilog is a much better solution15:40
lekernel__no15:41
kristianpaulah no no reading fpgaworls slides yes i remenber now15:41
kristianpaulneed to go..15:42
kristianpaulbye15:42
lekernel__bye!15:42
wpwraklekernel__: jlime for the ben doesn't have python by default (nor perl for that matter)16:20
lkcl_hi folks - does anyone have a mmone JTAG daughterboard made up, that i can either borrow or buy?  as long as it's standard JTAG that is :)16:33
lekernel__wpwrak: are you serious about running fpga synthesis on the ben? :)16:43
lekernel__lkcl_: where do you live?16:43
lekernel__wpwrak: though maybe wolfspraul's tools could handle small designs there... if the chip model fits in the RAM16:44
lkcl_lekernel__: i'm in the UK.  i'm debugging the 1st revision of the A10 EOMA68 CPU Card, i need a JTAG board, and i'd rather work with people who are in the free software community17:02
Fallenouis there really a Linux syscall to flush data or instruction cache ?17:22
FallenouI'm not sure a userland application should have access to such low level stuff like "flush caches"17:24
Fallenoua syscall access to DCC ICC seems reasonable though17:24
Fallenouif such a syscall already exist in Linux I can see no point in not implementing it17:24
Fallenoumwalle: what's the difference between your mmu and mmu-cleanup branch ?18:39
rohlkcl_: i recommend anything similar to the moko develboard or the amontec ones21:15
rohatleast for arm based stuff.. works great with openocd21:15
rohhttp://www.amontec.com/jtagkey-tiny.shtml http://wiki.openmoko.org/wiki/Debug_Board_v2 or http://wiki.openmoko.org/wiki/Debug_Board_v321:18
rohlkcl_: maybe send this guy a nice mail: http://pulster.de/d__omdebug__OpenMoko_Debug_Board___GRATIS__985.htm21:21
rohhe sells openmoko phones and sends out the debug boards for free with his moko orders on request21:21
wpwraklekernel__: (synthesis) dunno :) just commented on your question whether there was any distribution that had no python by default22:15
wpwrakand i would indeed hope that more efficient synthesis tools would eventually result from wolfgang's effort. the incredible slowness of the closed tools is plain incomprehensible and an insult to human ingenuity22:16
wpwrakFallenou: i'm not aware of any such syscalls. a syscall would seem somewhat heavy for this kind of tasks anyway.22:20
Fallenouwpwrak: ok, what would you think about allowing a user land application to play with ICC and DCC? It seems odd to me22:37
Fallenouuser land should never have access to very low level stuff22:37
wpwrakthere may be some use for being able to flush caches, e.g., to implement fast user-space interprocess communication22:46
wpwraknot sure how far other architectures let you go there22:48
wpwrakin general, flushing your caches should be a relatively harmless operation, considering that you could obtain the same effect by other means as well22:49
Fallenouyes22:58
mwalleFallenou: mh the mmu-cleanup branch are cleanuped patches for milkymist23:02
Fallenouso the most up to date tree with all features and work in progress is "mmu" ?23:02
mwallebut i'm working on a lm32 module, i hope lekernel__ can be convinced to include the processor as a submodule23:02
mwalleFallenou: the diff should be minimal, there are some additional cleanups on the mmu-cleanup branch, but there are more cleanups on the lm32 repo (not released yet)23:03
FallenouI think if you submit a patch that makes the makefile do the git submodule update --init stuff etc automatically he would agree ;)23:03
mwallebut the mmu stuff is the same on mmu-cleanup and the upcoming lm32 module23:04
Fallenouok23:05
FallenouI will very soon try to catch up with what you've done recently23:05
mwallethe mmu branch is better for reading the history :)23:05
Fallenouok great :)23:05
mwalleah and i found a bug in the qemu lm32 emulation code :)23:06
Fallenouohoh23:06
Fallenouit was hiding deeply in qemu codebase23:06
Fallenounice23:06
mwallecmpgeiu and cmpgiu may give the wrong result23:07
mwalleimporting the qemu tests in the lm32 test bench worked surprisingly well ;)23:08
Fallenou:)23:11
Fallenougoing to bed, gn8!23:11
--- Mon Dec 17 201200:00

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