#milkymist IRC log for Tuesday, 2012-10-16

azonenberglekernel: so i did some reading and it seems that if you are willing to pay the $100+ per 10gig SFP+ transceiver05:10
azonenbergyou could have a kintex-7 talk directly to a SFP+05:10
azonenbergand do 10gbe with no need for an external PHY05:10
azonenbergThis of course assumes you are running over fiber optics05:10
azonenbergThe other option would be infiniband using bare GTPs with no other external components except maybe TVS diodes or a buffer05:11
azonenbergYou cannot do a switch with the 70T though, unfortunately05:13
azonenbergthe GTPs are organized in quads and the 70T only has two quads05:13
azonenbergas best i can tell the quads share a common clock within themselves (for two tx and two rx pairs)05:14
azonenbergsorry, four tx and four rx so the 70T only has one quad05:14
Action: Fallenou is shooting a 3km long e-mail19:24
wpwrakoh dear :)19:37
mwalleFallenou: why do you have to do addi ea, ea, -419:38
mwalleseems a bit strange to me :)19:38
Fallenouwhen the DTLB generates an exception, the instruction causing it is at the "M" stage19:38
Fallenoubut EA saves the instruction at X stage19:38
mwalleso shouldnt the processor set ea right? :)19:38
wpwrakis it always +4 ?19:38
wpwrakerr, -419:38
larscmwalle: we have the same with for example other exceptions19:38
larsclike division by zero19:39
larscso it is only consistent19:39
Fallenouwell one point of view could be : the exception happens when the instruction X is executing, the M one is already executed19:39
Fallenouso it's kind of correct to then jump back to the one which was executing19:39
Fallenoubut in this case no, it should re-execute the M one19:40
Fallenoubut it's a re-execution19:40
mwallelarsc: mh makes sense, although i guess you dont want to reexecute the instruction causing div by zero again ;)19:40
larsci guess not19:40
Fallenouwpwrak: always -4 < good question, you mean if there is a jump or something ?19:40
FallenouI don't know actually19:40
Fallenouhummm I'm pretty sure it's always correct19:41
wpwrakFallenou: yup :)19:41
larsccan a jump fail with a data error?19:41
larsca dtbl exception19:41
Fallenoujumps are conditional to register values19:41
Fallenou(or inconditional)19:42
Fallenouwpwrak: that would deserve testing!19:43
Fallenouto see if this kind of situation can happen19:43
mwalleFallenou: and do i have to do ea=ea-4 for an itlb miss too?19:43
Fallenoumwalle: no because in this case the exception happens at the Fetch stage19:43
Fallenouso it happens during some instruction is executing, and we need to resume the execution right to the point where it was19:44
Fallenouand it will fetch again the instruction which caused the ITLB miss19:44
Fallenouhoping that this time it will be OK :)19:44
mwallewhat happens if theres an itlb and a dtlb miss?19:45
FallenouI never tested :x19:45
mwalleat the same time19:45
Fallenouwpwrak already asked this I think19:45
FallenouI really need to do the test19:45
FallenouI write this to the todo :)19:45
mwallei'm currently attending an (online) class for processor design, happens to be that theres just something about exceptions ;)19:46
Fallenouoh very cool!19:46
Fallenouis it a free online class19:47
Fallenouexpensive? open?19:47
mwallei guess thats a 5 stage mips pipeline, which they are discusiing19:48
mwalleand there the exceptions are delayed until the writeback stage19:48
mwalleand then prioritized19:48
mwalleiirc, was yesterday evening in bed and i was half asleep ;)19:49
mwalleanyway, i have another question for you guys ;)19:49
mwalledoes gdb support sth like helper functions?19:49
larscyou can write plugins in python19:50
mwalleeg. i upload some data, and a helper function and then call that function, which does something useful with the data19:50
mwallelarsc: yeah but then i can only use the commands the gdbstub supports, right?19:50
mwalleeg. on lm32 i can only do byte access19:51
larscif you upload extra code I think you can just execute it like normal code19:51
larsce.g. *((*func)(int, int)0x100000)(10, 20)19:52
mwallelarsc: and gdb sets a breakpont at the function return point automatically?19:52
mwalleor what happens if the functions returns?19:53
mwallemom brb19:53
larschm good question19:53
larscmaybe gdb uses a stub to call the function and has a breakpoint in the stub after the function call19:54
Fallenou21:43 < mwalle> Fallenou: and do i have to do ea=ea-4 for an itlb miss too? < about your question, you were thinking about qemu?19:55
Fallenouor just the code of the exception vector ?19:56
wpwraklarsc: i concur. i did that sort of thing in umlsim. you may not even need a stub, but having at least a known to be good instruction outside the code path as the return target can't hurt.19:59
larscset a breakpoint at some random address and setup your stackframe to have ra point to that address20:06
larscshould work i guess20:06
mwalleFallenou: both and consistency ;)20:08
wpwrakthat would depend on which exception has priority. e.g., if the breakpoint location has an invalid opcode, generates a TLB miss, etc., then you may have several things competing. may get messy to sort them out.20:09
wpwrakah, and if you don't have hw breakpoints, you don't have that problem anyway, since you need to write the trap instruction(s) :)20:10
mwallebut i guess nobody acutally knows how the 'call' command in gdb internally works? :)20:12
larscit's magic20:16
wpwraki'd set up the stack frame (you get all the necessary information about argument types and such from the DWARF data), set up the return trap, then preload the necessary registers and let things run20:20
wpwrakwhen you regain control you either get some exception, a breakpoint somewhere inside the call, or the return trap20:21
wpwrakin the latter case, you retrieve the return value, do any cleanup needed, and put the return value to good use20:21
mwalleok, but if gdb already supports calling functions, why should i do it by hand? :)20:27
mwallewpwrak: but yes that should be sufficient for a short helper, i dont even need the calling conventions.. i could preload some registers, do sth useful and trap20:29
mwalle(saving the registers of course)20:30
wpwrakwhat i mean is: this is how i've done it (successfully) in umlsim and it seems likely that gdb does something similar.20:31
wpwrak(umlsim includes what is basically a debugger that can be scripted in a variant of C)20:32
wpwrakx86 only, though. i never extended is to amd64. also, the "uml" part of it (User-Mode Linux) stopped working at some point in time. umlsim uses UML to control the kernel's idea of time. so you can, say, have two linux systems run and let them communicate via TCP over a link with a 100 ms delay.20:35
wpwrakor run  sleep 3600  in a shell and have it return immediately, with "date" before and after showing that an hour has passed20:36
Fallenoumwalle: the teachers seem very experienced :)21:05
mwalleFallenou: yeah and the course is actually about superscalar cpus22:29
mwallewpwrak: (umlsim) nice ;)22:29
mwalleinfcall.c seem to do the magic22:36
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