| --- Mon Oct 15 2012 | 00:00 | |
| GitHub136 | [migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/fecab5518bfef72105ab4ba437f0cad51fc4e6f4 | 17:33 |
|---|---|---|
| GitHub136 | [migen/master] transform/unroll_sync: support generator function - Sebastien Bourdeauducq | 17:33 |
| GitHub28 | [migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/daee4fb58c94db71885bfacbded5e4b77f8f6a93 | 18:23 |
| GitHub28 | [migen/master] transform/unroll_sync: autodetect in/out - Sebastien Bourdeauducq | 18:23 |
| Fallenou | why using only 1 exception handler for both i/d tlb misses is good ? | 18:38 |
| Fallenou | instead of 1 handler for each | 18:39 |
| Fallenou | because it might not be so simple to make this change | 18:41 |
| Fallenou | It's quite easy to keep 2 exception vectors, each calling the same C function which would then be the "unique" tlb miss exception handler | 18:42 |
| Fallenou | but having only 1 exception vector is not so easy | 18:42 |
| Fallenou | I don't know if there is a big performance problem with keeping 2 exception vectors (the 8 instructions in crt0.S) | 18:43 |
| larsc | why is it complicated to make the change? | 18:48 |
| Fallenou | for now I see only one problem but I don't have easy solution to solve it | 18:48 |
| Fallenou | in dtlb_miss_handler I need to do a addi ea, ea, -4 | 18:49 |
| Fallenou | before saving the registers and calling the dtlb_miss_handler | 18:49 |
| Fallenou | https://github.com/fallen/milkymist-mmu/blob/mmu/software/bios/crt0.S#L110 see there | 18:50 |
| Fallenou | but since .save_all routine saves all the registers afterward, I won't be able to make this change (ea -= 4) after save_all is called | 18:51 |
| Fallenou | because it won't do anything | 18:51 |
| Fallenou | at the end of the exception_handler there is the .restore_all_and_eret routine which restores all registers (and would then overwrite my ea) and then do "eret" | 18:51 |
| Fallenou | eret does jump to "EA" | 18:51 |
| Action: Fallenou is not sure if he is clear enough | 18:52 | |
| larsc | I understand it | 18:52 |
| Fallenou | or maybe I need to add detection of TLB miss source in "save_all" routine, to make it do the job on EA before saving it | 18:52 |
| larsc | or in restore_all | 18:54 |
| Fallenou | yes | 18:55 |
| Fallenou | just before the eret call | 18:55 |
| Fallenou | would be a better idea indeed | 18:55 |
| Fallenou | so my question would be, what's best : doing this hack (a check on tlb miss origin in .restore_all_and_eret)? or keeping 2 exception vectors (calling the same C function)? | 18:56 |
| larsc | hard to say | 18:57 |
| Fallenou | I don't quite remember in the first place why we wanted to only have 1 exception (vector? or handler?) for misses (and another one for permission faults) | 18:57 |
| larsc | me neither | 18:57 |
| Fallenou | I guess it's good for cache | 18:58 |
| larsc | I think mwalle was pushing for it | 18:58 |
| Fallenou | or maybe wpwrak or both | 18:58 |
| Fallenou | let's ask them :) | 18:58 |
| Action: Fallenou ping ping | 18:58 | |
| GitHub37 | [migen] sbourdeauducq pushed 2 new commits to master: https://github.com/milkymist/migen/compare/daee4fb58c94...31cdb02eff9b | 19:12 |
| GitHub37 | [migen/master] actorlib/spi: typo - Sebastien Bourdeauducq | 19:12 |
| GitHub37 | [migen/master] bank/description: regprefix - Sebastien Bourdeauducq | 19:12 |
| wpwrak | as far as a i remember, i didn't favour any of the two choices. if separate vectors are more convenient, then i don't see a need for trying to have just one | 20:09 |
| Fallenou | but then we need to have exception vector as well for permission faults | 20:29 |
| Fallenou | can ITLB issue permission fault ? | 20:31 |
| Fallenou | dtlb can issue permission fault for read/writes ... | 20:32 |
| Fallenou | ITLB ... I don't see what permission fault it can generate ... either the page is mapped (and then we can say it's executable) or either it is not mapped (and it's a miss) | 20:32 |
| Fallenou | right ? | 20:32 |
| Fallenou | or I am missing something ? | 20:32 |
| Fallenou | am I* | 20:32 |
| Fallenou | so can we say permission fault is just about DTLB ? (and then i's easy for this problem) | 20:34 |
| Fallenou | it's* | 20:35 |
| wpwrak | i think itlb and dtlb should have the same page tables. otherwise you get a lot of duplicate work. so "not mapped" to indicate "not executable" would require that the software does the checking, increasing the execution path of the handler | 20:35 |
| Fallenou | oh, the same page tables ??? | 20:35 |
| Fallenou | hum I think lekernel was thinking about the contrary | 20:35 |
| Fallenou | this kind of decision is a big change in the code of the mmu | 20:37 |
| Fallenou | so this deserves an email to the mailing list :) | 20:37 |
| Fallenou | so that anyone can give his opinion | 20:37 |
| Fallenou | so that I don't change everything for nothing :p | 20:37 |
| wpwrak | ;-) | 20:37 |
| Fallenou | for now each TLB has it's own "blockram" page table | 20:37 |
| Fallenou | which simplifies as you said the case of itlb miss which indicated the page is not mapped and then not executable | 20:38 |
| Fallenou | well no, not exactly | 20:39 |
| Fallenou | itlb miss just indicates it's not in the "tlb" , it could be mapped, that would need a check in linux internal structures | 20:39 |
| Fallenou | to check if there is a mapping | 20:39 |
| wpwrak | wait .. the tlb shouldn't really know about page tables. the mapping page table -> tlb is done in the handler. | 20:40 |
| Fallenou | yes sure | 20:40 |
| Fallenou | I just mixed up things :) | 20:40 |
| Fallenou | oh ok you were talking about the page table ... | 20:40 |
| Fallenou | right | 20:40 |
| wpwrak | :) | 20:40 |
| Fallenou | indeed the same page table | 20:40 |
| Action: Fallenou must be tired ... | 20:41 | |
| Fallenou | and in the page table you have the permission rwx, if the permission x is present and itlb misses, then we update the itlb line with the correct mapping | 20:41 |
| Action: Fallenou needs to think about this a little bit more | 20:42 | |
| Fallenou | I will shoot an email soon about that :) | 20:42 |
| Fallenou | need to go, thanks ! | 20:42 |
| wpwrak | np ;) | 20:44 |
| --- Tue Oct 16 2012 | 00:00 | |
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