| --- Wed Sep 26 2012 | 00:00 | |
| Fallenou | lekernel: DDR4 is this marketing bullshit or do we earn something by using that ? | 17:33 |
|---|---|---|
| Fallenou | http://www.engadget.com/2012/09/26/final-ddr4-specification/ | 17:33 |
| Fallenou | in term of real bandwidth | 17:33 |
| Fallenou | I hope they don't increase latency | 17:33 |
| lekernel | yeah, it should be faster | 17:41 |
| lekernel | 3.2Gbps/pin is higher than the ~1.8 of DDR3, and with more banks and the new access scheme you should increase page hit rate and make transfers more efficient than normal bursts | 17:43 |
| Fallenou | ok, great then ! | 17:44 |
| lekernel | of course, FPGA I/Os are still too slow to handle that *sigh* | 17:44 |
| Fallenou | :/ | 17:44 |
| lekernel | if you want very fast memory look at the GDDR | 17:44 |
| Fallenou | like GDDR5 ? | 17:44 |
| lekernel | yeah, it's 4.5Gbps/pin | 17:44 |
| Fallenou | why don't they use "GDDR" for main memory then ? what's the drawback ? | 17:45 |
| lekernel | it would be *great* to throw that into the M3 instead of a mess of multiple chips of DDR3 | 17:45 |
| lekernel | but with the shitty kintex-7 I/Os you can only go to 1.8Gbps/pin | 17:45 |
| lekernel | and with lots of jitter | 17:46 |
| lekernel | if you're using those PLLs | 17:46 |
| Fallenou | and withVirtex 7 ? (isn't it faster ?) | 17:46 |
| lekernel | seriously we're talking about 150ps of jitter here... that's 27% of your timing budget lost to that crappy PLL | 17:47 |
| Fallenou | wow | 17:47 |
| lekernel | I'm tempted by adding an external clock chip with a more reasonable (< 1ps) jitter level | 17:47 |
| Fallenou | to have the correct frequency directly, with no PLL/DCM | 17:47 |
| lekernel | problem is, in case of fuckups, PCB respins are expensive | 17:47 |
| Fallenou | why would it be more expensive ? | 17:48 |
| lekernel | virtex 7 is super expensive | 17:48 |
| Fallenou | clock chip is harder to solder than current osc ? | 17:48 |
| lekernel | well, because you're routing a lot of high speed, length matched traces between a clock chip, 8 DDR3 chips and a FPGA | 17:48 |
| lekernel | if you have skew, it can be harder to correct | 17:49 |
| Fallenou | ah yes you mean you have to modify the routing | 17:49 |
| lekernel | though some clock chips have multiple outputs with configurable phase... need to look at that | 17:49 |
| Fallenou | heh, like a DCM/PLL but on a chip | 17:50 |
| Fallenou | this clock chip would replace the current osc and only be connected to the FPGA via a GCLK io ? | 17:51 |
| Fallenou | no direct connection to DDR , right ? | 17:51 |
| Fallenou | or direct connection, but skew adjustment for nets between FPGA and DDR chip ? in order to take into account the time for the clock to go through the FPGA ? | 17:53 |
| lekernel | well, you'd need multiple phase aligned clocks, one for the 1.8Gbps data transfers and the other for the system (since you can't run it at 900MHz) | 17:53 |
| lekernel | maybe you can get away without a direct DDR connection, yes | 17:54 |
| lekernel | also, depending on how you deal with DQS, the PLL jitter might still be acceptable | 17:54 |
| lekernel | anyway, I'm a lot more worried about marketing than DDR3 now | 17:56 |
| Fallenou | yes that's what I understood | 17:58 |
| Fallenou | is there something new about M3 ? marketing ideas ? technical ideas ? | 17:59 |
| wpwrak | lekernel: if you have to add a clock chip but can do it in a way that allows you not using it (either by FOGA configuration or just not soldering it), then you'd have less design risk | 20:00 |
| wpwrak | also, if you market the critter for a specific purpose (e..g, video mixing), then technical specs don't matter all that much, as long as it does the job | 20:01 |
| wpwrak | so DDR4 is not the enemy. 4K or DVI-du-jour may be, though. | 20:02 |
| lekernel | you still need a lot of memory bandwidth ... | 20:14 |
| lekernel | which GDDR5 would better provide if the FPGA I/O and PLL weren't so lousy | 20:15 |
| Fallenou | wpwrak: (technical specs don't matter all that much, as long as it does the job) well yes that's something we learned through the Milkymist experience so far :) | 20:17 |
| Fallenou | we don't care we are not 1 Ghz/DDR4, but we indeed would care to have 1080p and hdmi | 20:18 |
| wpwrak | yeah. there are two really simple questions: "does it do what it promises to do ?" and "is what it does useful for me ?" | 20:20 |
| Fallenou | sure | 20:20 |
| Fallenou | and does it do as well (or better) as what I can have elsewhere ? | 20:21 |
| wpwrak | of course, at some point, price enters the equation too | 20:21 |
| Fallenou | yes | 20:22 |
| wpwrak | competition is included in the 2nd question: if the competition already does this and does it better, then what it the M3 does isn't so useful for me | 20:22 |
| wpwrak | s/it the/the | 20:22 |
| --- Thu Sep 27 2012 | 00:00 | |
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