#milkymist IRC log for Monday, 2012-09-24

wolfspraulfirst milestone reached - xiangfu verified the fpgatools generated AND design in his slx903:01
wolfspraulnow... next steps, let's see03:02
wolfspraulfirst a truckload of hardcoded/left-aside things in the sources, all over the place03:03
wolfspraulthen the next design will be a counter03:03
wolfspraulthe counter adds a clock (dcm), and jtag/bscan03:03
wpwrakyou have a working AND ? congratulations !!03:04
wolfspraulthat's a whole different level from the AND gate, maybe a realistic goal for that counter is 1 month...03:04
wolfspraulyeah well, many more steps needed, but ok03:04
wolfspraultoo much hardcoded stuff03:04
wpwrakdoes the AND do I/O too ? or is it just internal ?03:04
wolfspraulthe 'design' has maybe 20-30 bits on, you could hardcode the whole thing ;-)03:05
wolfspraulno no, xiangfu can control a led (the out-pin) with 2 in-pins03:05
wolfspraulin an AND-way03:05
wpwrakkewl03:05
wolfspraulyes it's a good step, but also not more than that, too much is missing03:05
wolfspraulneed to continue in the autotester, wire model, features galore, everywhere03:06
wolfspraultoo many to list here really03:06
wolfspraulbut the next goal is easy to understand: a counter03:06
wolfspraul1 month03:06
wolfspraulif that counter works, a lot more things need to be supported in the chip, compared to today03:06
wpwraknow things move more quickly :)03:06
wolfspraulthe AND design is called hello_world and looks like this https://github.com/Wolfgang-Spraul/fpgatools/blob/master/hello_world.c03:07
wolfspraulthat will write the design to stdout as a floorplan, so you can run ./hello_world | ./fp2bit - hello_world.bit to create the configuration file03:09
wolfspraulnext: counter03:11
wpwrakhmm, how about storing failure inside "rc" ? that way, you don't need error checking all over the place03:11
wolfspraulhow?03:11
wpwrakand maybe have a "debug" mode where it drops out immediately when something goes wrong03:11
wolfspraul'storing failure'?03:11
wolfspraulthe apis are still in flux, in addition to have lots of unimplemented cases behind the scenes03:12
wpwrakvoid fpga_whatever(... *model) { if (model->error) return; do_stuff(); if (trouble) { model->error = 1; return; } ... }03:12
wolfspraulhaving03:12
wpwrakor, better, make it "rc".03:13
wolfspraulouch that looks ugly to me, but ok :-)03:13
wolfspraulyou mean just let the model with 'stored error' pass through all sorts of functions on the way out?03:13
wolfspraulis that common practice somewhere?03:13
wpwrakthen you can have an int fpga_error(... *model) { int tmp = model->rc; model->rc = 0; return tmp; }03:13
wpwrakstdio has ferror for such things03:14
wpwrakyou can still return error codes if you want. but checking then becomes optional03:14
wolfspraulthen you have to check on the inside of every function call though03:15
wolfspraulit's a nice idea, I just have never seen it like this03:15
wolfspraulis this common practice somewhere?03:15
wpwrakthe most common practice is just to ignore errors ;-)03:16
wpwrakand if you have such a large number of checks, that's what people will be inclined to do03:16
wolfspraulthere may be less functions later, these apis are in flux03:16
wolfspraulyou would hope there are less calls...03:17
wolfspraulbut sure the error handling can be in model->rc as you said03:17
wolfspraulI would still return it but checking is optional03:17
wolfspraulwhy not03:17
wpwraki mean, in theory, nothing should ever go wrong in your program. it's not like kernel APIs that fail quite regularly in non-catastrophic situations03:17
wolfsprauljust wondering about some precedent in other libs/codebases...03:17
wolfsprauloh no, many things can go wrong03:17
wolfspraulin routing or configuration attempts etc.03:18
wolfsprauleven more so latr03:18
wpwraksure. but that's bad requests.03:18
wpwrakprogram errors. not just the universe conspiring against you03:18
wolfspraulsure, but I need rock-solid error handling03:18
wpwrakexactly :)03:18
wolfspraulanyway, thanks for the model->rc idea03:18
wolfspraulit means checking on every incoming call though03:19
wpwrakyou could have model->debug that then does an abort. maybe make a macro #define TROUBLE(_rc) do { if (!model->rc) model->rc = (_rc); if (!model->debug) return (_rc); fprintf(stderr, "rc %d\n", (_rc)); abort(); } while (0)03:20
wpwrakthat way, you'll know instantly if you tripped over something. and you only need more sophisication if you actually expect errors or if aborting is unacceptable (e.g., if it's some interactive editor or such). but i think it'll be a very long time until you need this level of sophistication, if ever :)03:22
wolfspraulI'll think about the model->rc thing first03:23
wpwrak(TROUBLE macro) if you check on entry, the if (!model->rc) test isn't even necessary. just set it and return03:23
wolfspraulmore important is to fill in many more missing pieces about the chip03:23
wpwrakreturn/abort03:23
wolfspraulbecause right now the AND thing is working, but it's far too many things that are hardcoded imho03:23
wpwrakstrict error checking just helps to avoid chasing ghosts :)03:23
wolfspraulI need to make one step back and think about the right order of where and how to continue now, since there are just so many things03:23
wolfspraulthe counter will hopefully provide the needed focus, and then I fill in missing things left and right03:24
wolfspraulthat's the plan...03:24
wpwraksounds good03:26
wpwrakso all those functions really need so many parameters ?03:26
wpwrake.g., couldn't fpga_find_iob just return a struct iob * instead of a set of variables ?03:28
wolfspraulah sure, this all could be changed in many ways03:28
wolfspraulmy general guideline is shorter and more readable code03:28
wolfspraulwhich is at odds sometimes, but when in doubt I first go for 'shorter'03:28
wpwrakyup, that's what i mean :)03:28
wpwrakshort calls, little redundancy03:29
wolfspraulbut shorter including all codes, I also write all the struct stuff on the other side...03:29
wpwrak;-)03:29
wolfspraulthere is no point for me to 'optimize' the api when I have only looked at 10% of cases or so03:29
wolfspraulso I just add case by case, and cleanup carefully03:29
wolfspraulbecause there will be more cases coming that require another round of cleanup/restructuring anyway03:29
wpwrakyeah, you can clean up things as you go. or when you're bored or suffer a "writer's block" :)03:29
wolfspraulI have this issue allover the codes, really03:29
wolfspraulthe thing stands at about 16k lines right now, I think03:30
wolfspraulby the time I have a somewhat nice counter working, it's probably over 20k03:30
wolfspraulso you look at those 70 lines hello_world, and complain about a few error checks and parameters :-)03:31
wolfspraulwhich is all correct, and good feedback03:31
wolfspraulbut that hello_world is so unbelievably clean already! :-)03:31
wolfspraul(compared to the messy 16,000 lines behind it...)03:31
wolfspraulthe one thing I will stay away from for sure is C++03:32
wolfspraulwhich is tempting at times especially when creating new aggregate yet simple data types03:32
wolfspraulbut no, thanks03:32
wolfspraulI stay clean :-)03:32
wpwrakyou'll always have "struct" :)03:33
wolfspraulin C++ you can do nice things with constructors etc.03:35
wolfspraulbut no worries03:35
wolfspraulI will not remove the error checks with exceptions :-)03:35
wpwrak;-)03:35
wolfspraulthrowing some stl templates?03:36
wolfspraulso: counter now03:36
wpwrakeven those exist in C. longjmp :)03:36
wolfspraulcounter counter counter03:36
wolfspraulyeah03:36
wpwrakyeah, counter is better than templates ;-)03:36
wolfspraulI vaguely remember using that many years ago03:36
wolfspraulcounter now, goal: 1 month03:37
wolfspraulthat's aggressive, but I try03:37
wolfspraulmaybe I make a little hello_world video this week, to relax03:37
wolfspraulit's nice to walk throuhg the steps and see the led go on and off :-)03:37
wpwrakoh yes, you should03:37
wpwrak;-)03:37
wpwrakalways remember the motto: "do good things and brag about it" :)03:38
Fallenouhello !p07:21
Fallenoucongratulations wolfspraul !!07:22
Fallenouthis is so amazing to see your fpga tool working :)07:22
wolfspraulthanks, but keep it in perspective07:25
wolfspraulit supports 0.00x% of what the chip can do07:25
wolfspraulI changed my next step a little - not the counter right away but just a blinking led first :-)07:25
wolfspraulthat means only add a clock, not jtag/bscan07:25
wolfspraulthen the counter after that07:26
FallenouI don't fuckin care if it supports 0.000001% of the chip :p07:28
Fallenoufor now it does something with the chip07:28
Fallenoua led blinks !07:28
Fallenouthat's more than enough for a lot of people ;)07:28
Fallenouwell for now it blinks manually, or maybe you can hook up an arduino to control fpga inputs :p07:28
Fallenoulet's make it blink automatically ;)07:29
wolfspraulyes blinking_led (clock controlled) next07:30
wolfspraulafter the AND milestone I will take a one or two day break though :-)07:30
Fallenousure07:31
Fallenouand make a youtube video !07:31
wolfspraulFallenou: what do you think we should get to work in the chip next?07:40
wolfspraulI am thinking about a bit more debug instrumentation first, logic analyzer, serial/usb/spi, jtag of course, etc.07:43
Fallenouwhen clock and dcm works , maybe add BlockRAM support ? :)07:47
wolfspraulah yes, of course07:48
Fallenouthen you can scan a blockram and SPI it out to a gpio as a testbench07:48
wolfspraulbram and macc07:48
wolfspraulbut I was thinking more about real-life use cases07:48
wolfspraulmaybe too early now to even think about07:49
wolfspraulmore instrumentation first...07:49
Fallenouwell until you have "almost everything" working it's hard for real life use cases :)07:50
Fallenoujust do testbench like your led blinker07:50
wpwraki concur: there's nothing new in "real life applications", so they can wait10:22
larscwolfspraul: yeay!10:36
larsc:)10:36
lekernelwolfspraul: good job:12:46
lekernel!12:46
Fallenoulekernel: nice they seem to at least want to spend time on fixing segfaults on their tools12:50
cdewolfspraul: congrats :)13:20
cdeas somebody once said, "you'll be free, hackers. you'll be free"13:20
kristianpaulcheers wolfspraul :) !14:21
wpwrakI have a dream that one day the hackers will rise up and and cast away the manacles of closed FPGA tools. I have a dream today. And when this happens we will be able to join hands and sing: "Free at last ! Free at last !"14:32
Fallenoucan I quote you in a tweet ? :p14:35
kristianpaul:-)14:35
wpwrak;-)14:44
wpwrakit's too long for that. you'll need at least two tweets :)14:44
Fallenousure :p14:46
FallenouI think it's worth it14:46
wpwraklet's fix some typos then, s/and and/and/14:48
wpwrakand perhaps make it sound bettter with  s/we will/we will all/14:49
Fallenoulet's keep the thuth of the spontaneous declaration :p14:50
Fallenouhop, tweetd !14:50
Fallenou+e14:50
wpwrakwell, most of it comes from http://www.chicagotribune.com/news/nationworld/sns-mlk-ihaveadream,0,36081.story14:58
wpwrakand there's an "all" in there that i missed on the first try :)14:58
wpwrakFallenou: ah, but your tweets lack context. should link to the project's github page17:07
Fallenouwpwrak: I tweeted it a bit earlier in the day17:17
FallenouI think my followers will get the link :p17:17
wpwrakah :)17:22
wpwrakso wolfgang should better prepare the press conference. well, it'll take the journalists of the world a while to fly over to beijing ...17:23
Fallenouhehe sure17:24
Fallenouit reminds me I must commit harder !17:25
mwallehi17:40
mwallemissed many thinks i guess ;)17:40
mwallecongrats wolfspraul17:40
mwalle:)17:40
Fallenouhum21:50
Fallenouif I map vaddr A to paddr A21:50
Fallenousay DTLB is disabled for now21:51
FallenouI write the value B to (paddr) A21:51
Fallenouoh, forget about it21:51
mwalleFallenou: when does an itlb miss happen?22:12
mwalleeg. calli N, where N is a non mapped address @0x100022:12
mwalleand the instruction calli 0x1000 is at 0x20022:13
Fallenouit happens when an instruction goes from address stage to fetch stage, with ITLB enabled22:15
Fallenouand if ITLB misses22:16
Fallenouok let me check22:16
Fallenouso the call will at some point make pc_a be 0x100022:17
Fallenouand when pc_a goes to pc_f, bim itlb miss, excepion etc22:18
Fallenou+t22:18
mwallei guess calli is still executed22:18
mwalleand the itlb miss happens at 0x1000, that is BADADDR is 0x100022:18
mwallewhat is ea?22:18
Fallenouyes calli is executed22:19
Fallenouit's the fetch of 0x1000 which triggers the MISS, not the execution of calli22:19
Fallenouyes BADADDR is 0x100022:19
Fallenouea is the instruction being executed (pc_x) when 0x1000 was being fetched22:20
Fallenoulet me run a simulation with itlbtest :)22:22
FallenouEA is 0x100022:22
FallenouEA == BADADDR in case of ITLB miss22:24
Fallenouwhich seems correct, else it would not work22:25
Fallenouwe need to jump back to our call target upon eret22:25
Fallenoudoes it make sens to you ?22:27
mwalleFallenou: yes that makes sense ;)22:29
Fallenouin some way it's kind of magic, I don't remember right now why it works22:31
Fallenoubecause in theory EA gets the address of the instruction in X stage , not the one in F stage22:31
FallenouI think I must be delaying the exception or something after the miss is detected so that it happens when the cause of the miss is in X stage22:32
Fallenousomething like that22:32
Fallenouit's sad that I don't know why it works :p22:33
FallenouXilinxInc started following you <= ahah !22:46
Fallenougn8 !23:01
wpwrakthey're after you ! :)23:24
mwallegn23:31
mwallegn823:31
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