| hellekin | so, when I meet with the guys from CEITEC, the chip fab in Brazil, what should I tell them to convince them to build free hardware? | 00:03 |
|---|---|---|
| wpwrak | hellekin: "it's fun" ? :-) | 00:05 |
| wpwrak | hellekin: what kind of chips do you have in mind ? | 00:05 |
| hellekin | wpwrak: I think the best compromise would be some router stuff. They do have radio engineers, but mostly to produce RFID, so it's probably not the same as proper RF or WiFi | 00:06 |
| hellekin | but in general, I'd like that they think about producing public infrastructure, so cheap mesh networking would be best | 00:07 |
| wpwrak | shall we move it to #qi-hardware ? | 00:08 |
| hellekin | as a fallback, PBX chips could be interesting. I don't see any of non-leaders building consumer nanoware anytime soon. A smartphone is very unlikely, although Brazil does have some local production (e.g., gradiente) | 00:09 |
| hellekin | could be | 00:09 |
| wpwrak | hmm. board-m1/r4/m1.net - why ?!? it's a generated file | 09:31 |
| Fallenou | I think I know why adding the rcsr to the itlb miss handler made it work, and removing it made it go in endless loop | 19:04 |
| Fallenou | somehow the value (modulo 16) of the address of instruction doing the eret is important | 19:04 |
| Fallenou | because if you have a icache miss while doing eret, you are going to tlb miss during itlb handler | 19:06 |
| Fallenou | because icache miss is delaying the pipeline movement | 19:06 |
| Fallenou | so if eret address is a multiple of 0x10 then you lose (or something like that) | 19:07 |
| mwalle | Fallenou: athough you can do ops with vaddr now in one operations, you still need one more instruction for the or ;) | 20:58 |
| mwalle | Fallenou: how many bits are unused in the VADDR register? | 20:58 |
| Fallenou | hum I would say something like 11 | 20:59 |
| Fallenou | depends on your page size though :) | 20:59 |
| Fallenou | for 4 kB pages, you have 12 unused bits, one you have to keep for TLB selection | 21:00 |
| mwalle | and we encode the operation in that free bits, now? | 21:04 |
| mwalle | except for update, which is implcitly done with writes to paddr | 21:04 |
| Fallenou | yes that's what we agreed on :) | 21:20 |
| mwalle | update is not atomic, but i guess thats ok | 21:30 |
| Fallenou | update should run only in miss handler with no exceptions | 21:45 |
| mwalle | Fallenou: wheres the valid bit? | 21:54 |
| mwalle | eg if i want to read back a TLB entry | 21:55 |
| GitHub36 | [linux-milkymist] sbourdeauducq pushed 1 new commit to ng: http://git.io/9z25hg | 22:35 |
| GitHub36 | [linux-milkymist/ng] merge - Sebastien Bourdeauducq | 22:35 |
| Fallenou | mwalle: wy do you want to read back a tlb entry ? | 22:56 |
| Fallenou | why* | 22:56 |
| Fallenou | you have the page tables in the OS | 22:56 |
| Fallenou | tlb can be updated or invalidated | 22:57 |
| Fallenou | but I didn't think the OS needed to be able to read the content | 22:57 |
| Fallenou | as of now there is no read back feature | 22:57 |
| Fallenou | gn8! | 23:11 |
| --- Wed Jul 25 2012 | 00:00 | |
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