#milkymist IRC log for Monday, 2012-07-16

qi-botThe firmware build was successful, see images here: http://fidelio.qi-hardware.com/~xiangfu/build-milkymist/milkymist-firmware-20120716-1155/11:39
Action: Fallenou is trying to boot linux-milkymist on his M119:04
Action: Fallenou loaded two times simpleImage.milkymist_one into his M1 via serialboot using flterm, nothing after [DONE]19:05
Fallenoukernel load address in .config is 0x40000000 and I did not specify a kernel address in flterm cmd line (since it's the default one)19:05
FallenouI just did ./flterm --port /dev/ttyUSB0 --kernel path/to/kernel19:05
Fallenouand then hold one two buttons and then push the third (reboots the board afaik) and then ESC and serialboot19:07
mwalleFallenou: you're there?20:58
mwalleah :)21:05
Fallenouhi !21:06
mwalleFallenou: isn't it enough to set VADDR and PADDR (without the lowest bit set to anything special) and just use TLBCTRL to specify which TLB to update/flush/invalidate?21:06
Fallenouyes why not21:07
Fallenoufor now it's not like this, but I could do it like this21:07
mwallewpwrak: btw i think we need the B* versions of the ITLB/DTLB/USR bits too, eg. the debug monitor should run with TLBs off and in kernel mode21:08
mwalleFallenou: lekernel_ had a nice idea to duplicate the IE register but just the bits we need in the new one21:09
mwallei kinda like that idea ;)21:09
Fallenouwhat do you mean "duplicate" ?21:10
Fallenoutwo CSR ? IE and IE2 ?21:10
mwalleleave the IE register as is and use a new one (i called it PSW)21:10
mwalleyes two CSRs bit with the xIE bits shadowed from the original one21:11
mwalleso new programs can use this CSR and old ones the IE register21:11
mwalleand we dont have to worry about backward compatibility21:12
mwalleFallenou: btw is the cache virtually indexed now?21:14
FallenouVIPT yes21:15
Fallenouit was virtually indexed before as well21:15
Fallenoubut now it's physically tagged21:15
FallenouPSW <= is it an acronym for something ?21:17
mwalleprocessor status word21:20
mwalleif you have some better name, let me know ;)21:21
Fallenouoh bradley manning =)21:24
FallenouI guess he is in serious shit21:24
mwalleFallenou: http://pastebin.com/z4QrHWFq these are the current csr's and bits21:25
Fallenouoh !21:26
mwalleand this is some small test program: http://pastebin.com/tzEtAqRS21:26
Fallenouhow does PSW and current IE interract ?21:26
mwallesetting PSW.IE is same as setting IE.IE (rsp. EIE, BIE), its just shadowed into PSW21:27
mwalleeg. setting IE.IE resutls in PSW.IE being set21:28
Fallenouoh ok so those 3 bits are mirrored to the two PSW and IE registers21:28
Fallenouand PSW has extra bits21:28
Fallenouso that we can only use PSW, but old software using IE still work21:28
Fallenousounds nice21:28
Fallenoua bit weird, but it works21:29
Action: Fallenou looking your pastebin21:34
mwalleFallenou: of course we could sacrifice backward compatibility and just the new CSR PSW replacing the old IE one, to be discussed ;)21:36
Fallenouthe reason for not using IE for TLB is that old software would mess everything up ?21:37
Fallenoubtw MMU stuff in lm32 would be optional (enabled or disabled in lm32_include.v) so that you can run old software without any problem synthetizing lm32 without mmu21:37
Fallenoubut functionally speaking I think your solution is the best21:38
Fallenouit works in any case21:38
mwalleFallenou: yeah and avoid such things like TLBCHG, the bit wpwrak suggested21:38
mwalleFallenou: its not mine, its the best from lekernel_ and wpwrak ;)21:39
Fallenouwhich adds instructions and therefore is not optimized ?21:39
mwallenah imho its a small hack ;)21:39
mwallei'll cleanup the qemu source, write some tests and put it on my github site, hopefully by tomorrow21:40
Fallenouok awesome :)21:40
FallenouI will implement CSR as we discussed ASAP21:41
mwallebut as you said, nothing is fixed atm, i just wanted to provide 'some' implementation of an MMU21:41
mwalleso we can play with it, i guess its easier in qemu than in hw ;)21:41
Fallenouhehe easier or not it's time to spend :)21:41
Fallenouyour time is as valuable as mine21:41
Fallenoudon't want to lose your time21:42
Fallenoubut anyway , I think we agree on the implementation now21:42
mwalleits fun ;)21:42
mwalleFallenou: btw it should be easy to read back the TLB entries, shouldn't it? maybe they are useful in debugging21:43
mwallei guess we're running out of CSRs...21:44
Fallenouwell I thought we were21:45
mwalleiirc one of the unused csrs you mentioned is used for CSR221:45
Fallenoubut I think we still have plenty of CSR21:45
FallenouI listed in my email all IDs that I could not see in lm32_include.v21:45
mwallenonetheless there are also plenty of lower bits free in the wcsr/rcsr opcode21:45
Fallenouthinking that since they were not listed, they were not used/implemented yet21:45
Fallenouso free to use21:46
wpwrakmwalle: PSW could also have the IE bits. so "new" software could use it instead of the IE register (why oh why did they have to use the same name for the register and the bit ?)21:49
wpwrakmwalle: regarding B*, probably yes. i hadn't paid attention to them yet.21:49
FallenouB* ?21:50
wpwrakBIE and corresponding B* bits for the TLB21:53
azonenbergSo I see some interesting blocks in the corner of spartan621:54
azonenberganybody know what these do?21:54
mwallewpwrak: mh? my PSW suggestion have IE, USR, ITLB and DTLB in it21:54
azonenbergSLAVE_SPI, SPI_ACCESS21:54
Fallenouoh ok BIE, I see now, I never paid attention to breakpoint stuff :x21:55
azonenbergSPI_ACCESS was mentioned briefly in these channel logs a while ago but i never heard if anyone figured out what it did21:55
azonenbergyou think there was originally plans for a stacked-die spartan6-N series like spartan3an?21:55
Fallenouazonenberg: maybe ug333.pdf page 9/9021:56
azonenbergwhat about SLAVE_SPI?21:56
Fallenouit connects the fpga design with in-chip flash memory21:56
Fallenouthe spi_access21:57
azonenbergSo that would mean there's bond pads on the s6 die21:57
azonenbergintended to connect to stacked-die SPI flash21:57
azonenbergthat isnt actually used?21:57
wpwrakmwalle: (PSW) ah, good. everything's covered then :)21:57
azonenbergalso, interesting21:58
azonenbergspartan3an have atmel dataflash onboard21:58
Fallenouhum slave_spi is maybe how to send bitstream through external spi ?21:59
Action: Fallenou guessing21:59
azonenbergNot sure21:59
azonenbergit doesnt seem to be documented21:59
FallenouI know you can do this anyway21:59
Fallenoucause I did it21:59
Fallenouon a Spartan 321:59
azonenbergYeah, i've made my own spi controllers too21:59
azonenbergbut slave implies fpga = slave21:59
azonenbergso i wonder how that works21:59
Fallenouwell yes there is a mode in which you program the fpga, and fpga is a spi slave22:00
azonenbergi know, but outside configuration what does that do22:00
Fallenouan external uc sends clock and data22:00
Fallenou"slave serial configuration"22:02
Fallenoupage 24/162 of ug380.pdf22:02
Fallenou"Slave Serial configuration "Typical setup includes a processor providing data and clock.22:02
azonenbergYes, i know about that22:02
azonenbergbut what use is it outside of booting the fpga?22:03
azonenberghaving a dedicated fabric-routable block implies it's usable after configuration22:03
Fallenoureconfiguration ?22:03
Fallenoupartial reconfiguration ?22:03
azonenbergbut it just looks to have connections to MISO, MOSI, CSB, CLK, etc22:03
azonenberglike i would expect from external SPI22:03
azonenberghow is that different from the ICAP22:03
Fallenouhardware slave spi, in order for you not to implement it using fpga slice ?22:03
azonenbergbut it doesnt include a SERDES or parallel otput as far as i can see22:04
Fallenouyou seem to know more than me :)22:04
Fallenousorry I think I can't help22:04
azonenbergi'm just looking at the pins hooked up in planahead22:04
mwalleazonenberg: maybe there are plans for the -N version of it, but no real customer yet?22:08
azonenbergalso possible they just wanted to futureproof it22:08
azonenbergi cant imagine those few extra bond pads cost much die area22:08
Fallenoutime to sleep for me, only slept 4 hours last night :)22:09
Fallenougn8 !22:10
mwalleazonenberg: btw what are youre cpld reverse engineering efforts do? iirc you bought some xilinx cplds to make photos from the die?22:10
mwalleFallenou: gn822:10
Fallenoubtw if someone knows why I cannot boot linux-milkymist on my M1 I am interested :p22:10
Fallenouat some point I will need to have it boot :p22:10
azonenbergmwalle: we took photos of an xc9536xl but have not gone any further than that22:10
azonenbergat the moment my main RE efforts are focusing on a ST 24C0222:10
azonenbergi want to fully understand the whole thing at transistor level22:10
mwallei2c eeprom?22:11
azonenbergEEPR0N ;) http://siliconpr0n.org/archive/doku.php?id=mcmaster%3Ast%3A24c02622:11
mwallebecause your hunting an i2c bug? :)22:11
azonenbergnude photos of floating gates22:11
azonenbergand no, just curious22:12
azonenbergits simple and large process tech22:12
azonenbergtherfore shouldnt be impossibly hard to completely analyze22:12
mwallenice google maps on a chip ;)22:15
Fallenouahah yes22:16
mwallei'm going to bed, too22:19
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