#milkymist IRC log for Tuesday, 2012-07-10

wolfspraulwow, so nice to see the mmu documentation evolving00:35
kristianpaullekernel_: this looks like a proper way get 5 bit csr support for you http://fpaste.org/NwrP/raw/ ?04:42
Fallenoucladamw: hey :)08:45
Fallenouvery good news !08:45
FallenouSo R4 is finished finished ?08:46
cladamwFallenou, hi just design files( sch, routes, gerber files)08:46
Fallenouso it's ready for manufacturing ? :)08:47
cladamwthey are done from altium design version not KiCad. :-)08:47
Fallenousure, for now only schematics are done in KiCad, right ?08:48
cladamwyes, also includes footprints in KiCad is also done.08:48
cladamw(initial done) for KiCad, since no one has given feedback or review so far. if more one to review that is very welcome.08:50
Fallenouunfortunately I don't have any skill in schematics/routing, sorry :'08:51
cladamwbtw, m1r4's footprints are very common to use in other projects though. Take those footprints if you like or to modify or maybe fix potential bug. :-)08:51
cladamwnot sure how many people use Fped to generate footprints now. :-)08:52
Fallenouwhat is Fped ? *excuse my ignorance*08:53
cladamw(footprint editor, Fped) designed/contributed  by Werner: http://projects.qi-hardware.com/index.php/p/fped/08:54
cladamw(footprints) and all parts of m1r4's Fped footprints are collected under: http://projects.qi-hardware.com/index.php/p/kicad-libs/source/tree/master/modules08:57
Jiahi all, I think I've fixed the lm32-gcc bug.08:59
Fallenoucongratz !08:59
Jiaand I'll send the patch to gcc-patches this night.08:59
Fallenouwhat was the bug about ? I didn't follow this thread08:59
Fallenougreat :)08:59
Jiathe mov pattern08:59
Fallenouis there a bug tracking ticket somewhere about this ,09:00
JiaFallenou: you are working on?09:00
FallenouI am working on the MMU09:00
JiaMMU is reallllllllllllllllllllllllllllllllly a complex thing!09:01
FallenouI'm trying to make a simple one :)09:01
Fallenousimple that works fine !09:01
Jiais IMMU and DMMU speratelly?09:02
FallenouITLB and DTLB are separate yes09:02
Fallenoua few informations about the mmu design : https://github.com/fallen/milkymist-mmu/wiki/Documentation-of-milkymist-mmu09:03
FallenouI am using gcc to test the mmu (modifying Milkymist BIOS)09:04
Fallenouso if there is gcc bugs I feel concerned :p09:04
Jiaclang is cool! both gcc and llvm is good to me. I'm one of the offical llvm developer :-)09:05
Fallenouoh nice :)09:05
Fallenouwe are trying to get rid of using gcc here because we have very few support from gcc09:05
Jiawhen I working on QEMU-OpenRISC, I find, MMU is really complex.09:06
Fallenouand gcc is hard to understand/patch09:06
Fallenouso clang is really much appreciated :p09:06
Jiagcc's code is mess.....09:06
Fallenouyes =(09:06
Fallenouoh you did the OpenRISC model in qemu ?09:06
JiaQEMU is very stickly right now, my V8 patches is still some problem...09:07
FallenouMMU can be a very complex thing, especially when you add tons of features in it09:08
Fallenouhere I am trying to do one that does the minimum needed features09:08
Fallenouto keep it efficient and simple09:08
Jiasimple is nice.09:09
Fallenouso basically translation of virtual address to physical ones using a TLB translation cache09:09
Fallenouexception generation when TLB miss09:09
Fallenouand (to be done) check for permissions (read, write, execute)09:09
Fallenouand maybe a dirty bit thing but it's not yet clear in my head09:10
Fallenouand that's basically all09:10
Fallenouno hardware page walker for instance09:10
lekernel_the devil is in the details :)09:10
Fallenousure :)09:10
lekernelJia: cc me on the gcc patch09:10
Jialekernel: OK09:11
Jialekernel: and, may I get to know how did you make clang support lm32 directly? :D09:14
lekernelmain commit is this one: https://github.com/milkymist/clang-lm32/commit/ddbd2d49c5cfc2ec56da676a74a9cdc6d661180609:16
lekernelthen I just renamed "mico32" into "lm32", otherwise clang was looking for tools named mico32-elf-ld etc.09:17
Jiais offical clang have this feature?09:19
Jiaand, sbourdeauducq make this change?09:19
Action: Jia can using clang instead gcc in my work!09:20
lekernelno, it's not merged yet (neither is lm32 support)09:20
lekerneli'm sbourdeauducq09:20
Jiayou should summit this to clang-commits! It is very cool!09:21
Jialekernel: and, when you summit it to clang-commits, I'll ping for you :-)09:26
stekernyeah, I agree, I find the notion of a baremetal toolchain useful as well (i've been thinking about cherry-pick it into clang-or1k ;))09:31
Jialekernel: your email?14:04
Jiasebastien AT milkymist.org is OK?14:11
lekernelyes, got it... thanks!14:20
lekernelkristianpaul: looks quite ok, except that you probably need to fix the address slice in csrbrg too. but why not just use -ng?14:26
kristianpaullekernel: to be honest but not offesive of course, i think ng besides the memory improvement is over eng effort15:55
kristianpauland just offer me another layer of posible trouble besides verilog machine generated code :)15:55
kristianpauli would not mind at first automate the arbiter generation for example15:56
kristianpaulusing makefiles or some more basic scripting...15:57
wpwrakthat's often the more expedite approach: handle the highly structured generation task in a script that you feed with the interface definitions (signal names or whatever), then include the result in the rest of your program16:01
lekernelkristianpaul: and you know, of course, that with migen your messy change would be a 1-line patch for the whole system, right?16:02
wpwrake.g., you see very few people write C/C++ preprocessors these days. it's much more common to just generate a few .c/.h files and use these16:02
wpwrak(of course, verilog has an awkward preprocessor, which diminishes its value)16:04
kristianpaullekernel: yes i know16:24
Fallenouwpwrak: reading your email !17:19
Fallenouwpwrak: you wrote about IE because IE has a lot of unused bits I could use as a status and control register for *TLB ?17:24
wpwrakIE because it is already saved in this sort of context. and yes, it has a lot of unused bits, too :)17:25
Fallenouok good idea17:25
Fallenouwpwrak: what you call X.USR is whether we are in the kernel or user land ?17:31
wpwrakyes, 0 for kernel/supervisor (i.e., CSR unrestricted), 1 for user (i.e., CSR restricted)17:33
Fallenouso basically the switch_to_kernel/user_mode function of TLBCTRL CSR would be moved to IE CSR17:34
Fallenouwhich has the nice backup/restore feature17:34
wpwrakyup, that's the idea. may make things easier than having to tweak a number of other CSR registers18:00
larscwe could really use a mode flag for the IE register even for non-mmu mode. right now we have to emulate this using a global variable18:04
larscwhich is kind of tedious, because you have to pay carefull attention to race condtions18:04
larscI always write all these -ful and al- words with two l's, that's kind of annoying18:06
wpwraka kernel mode flag ? or a disable/enable interrupt flag ?18:06
Fallenoukernel mode flag I think18:06
larsckernel/user mode flag18:08
larscand opencores has it too in non-mmu mode, iirc18:09
Fallenouwpwrak: about the last comment of your email, you mean making sure legacy code that used to play with IE csr don't overwrite/drop TLB flags ?18:09
wpwrakalmost every architecture has some supervisor/kernel mode. i'm a bit surprised LM32 doesn't have it already.18:10
wpwrakFallenou: yes. plus, be able to control IE.IE without having to worry about the TLB18:10
larscoh and access to the csr register should be disabled in user mode18:11
Fallenouusually when you modify a CSR, you read it first in an unsigned int, then you modify and you write it back18:11
wpwrakat least writes18:11
Fallenoularsc: sure18:11
Fallenouso you should never lose TLB flag in IE if you touch IE.ie18:11
larscwpwrak: I wouldn't worry too much about legacy applications18:12
larscwe are not intel ;)18:13
wpwraklarsc: well, it's just painful if you introduce quirks :)18:16
Fallenouit's not quirk, it's normal that if you modify a CSR you don't overwrite flags18:17
Fallenouyou just read it, |= / &= and write it back18:17
Fallenouall legacy code should have done it this way18:17
wpwraknasty surprises could include a "supervisor mode" bit which, if you clear it by accident, disables access to the CSRs. that would send you bug-hunting for a while :)18:19
larschow much legacy code is there?18:20
Fallenourtems code/flickernoise code18:20
Fallenouand actual linux port18:20
Fallenouindeed current milkymist bios code does irq_enable(0); and irq_enable(1); without reading IE :x18:24
Fallenoubut it's easily fixable18:24
Fallenou(irq_enable() being declared in https://github.com/milkymist/milkymist/blob/master/software/include/base/irq.h)18:24
larscif the mode bit is 1 = usermode, 0 = kernel, this shouldn't be a problem, should it?18:26
Fallenouit should be fine I guess18:28
Fallenouwould you see a special exception vector for page persmission exception ?18:28
Fallenouor a unique exception for both TLB miss and page permission ?18:29
Fallenouunique exception vector*18:29
larscno idea, to be honest18:30
wpwrakhaving a separate vector would help to keep the TLB refill path short18:32
wpwrakthe TLB miss handler may basically look like this:18:33
wpwrakuint32_t *p = page_table[addr >> 22];18:33
wpwrakif (!p) goto fault;18:34
wpwrakp = (uint32_t *) page_table[(addr >> 12) & 0x3ff];18:34
wpwrakif (!p) goto fault;18:35
wpwrakTLBPADDR = p;18:35
wpwrakTLVADDR = virt;18:35
wpwrakso if you don't need to check permissions at all, that helps18:36
Fallenouok !19:08
Fallenoufair enough19:08
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