| azonenberg | Woo, i now have an alpha of my internal LA ready to go | 02:00 |
|---|---|---|
| azonenberg | http://code.google.com/p/red-tin-logic-analyzer/ | 02:00 |
| azonenberg | whoops i meant http://code.google.com/p/red-tin-logic-analyzer/downloads/list | 02:02 |
| GitHub76 | [board-m1] adamwang pushed 1 new commit to master: https://github.com/milkymist/board-m1/commit/866c2de2d30396eb7b396df0e7d15cab8507a5b1 | 03:32 |
| GitHub76 | [board-m1/master] added brand and classification name of fields and enable both for chips. - Adam Wang | 03:32 |
| wolfspraul | what's the difference between hard1 and keep1 in the fpga? | 06:06 |
| wolfspraul | hard1 ties a net to logic-high (hard0 to logic-low). but what is keep1? | 06:06 |
| larsc | wolfspraul: in which context did you find those terms? | 06:46 |
| lekernel | it's for the (obsolete and buggy) keeper primitive | 07:48 |
| GitHub58 | [board-m1] adamwang pushed 1 new commit to master: https://github.com/milkymist/board-m1/commit/d41a79098ce89bf7be7001b3cef7f6c579d4d92d | 07:53 |
| GitHub58 | [board-m1/master] Power_Tree.sch: added info for FPGA block - Adam Wang | 07:53 |
| lekernel | just ignore | 07:55 |
| lekernel | how did you find it without ISE, by the way? :) | 07:55 |
| wolfspraul | well I would still like to know what it was meant to be or once was | 08:00 |
| wolfspraul | there seems to be something like a 'keep circuit' that I just don't know anything about, that's what I was getting at | 08:00 |
| wolfspraul | what does it mean electrically? | 08:03 |
| wolfspraul | or supposed to mean | 08:03 |
| lekernel_ | now that FPGAs don't have internal tristates anymore, it doesn't mean anything | 08:55 |
| wpwrak | tristate net maintaining its last driven state when nobody drives it anymore ? | 10:37 |
| lekernel | yes | 10:38 |
| lekernel | this was obviously using a lot of power and causing timing problems... they dropped it now, along with the whole internal tristate idea | 10:39 |
| lekernel | also having internal tristates means you cannot really use buffers for PIPs, only pass transistors - and enabling pass transistors adds capacitive load to a net and slows down the whole thing, making the timing model more complicated | 10:40 |
| lekernel | there was also the problem of internal contention (which still exists now, but you need to fuck up the bitstream encoding, not just use the tools in the normal way) | 10:45 |
| wpwrak | oh, so they had a physical device doing that keeping. lovely :) | 10:47 |
| GitHub49 | [migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/67dc911788a76722aea383c8ce6da07757a82e79 | 11:24 |
| GitHub49 | [migen/master] examples/sim/dataflow: use new dataflow API (thanks Ross Manyika for reporting) - Sebastien Bourdeauducq | 11:24 |
| GitHub159 | [migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/8142c4f0d988242c0e5c2efc5f792356f378d4f7 | 12:00 |
| GitHub159 | [migen/master] examples/dataflow/dma: use new dataflow API (thanks Ross Manyika for reporting) - Sebastien Bourdeauducq | 12:00 |
| qi-bot | The MMU firmware build was successful, see images here: http://fidelio.qi-hardware.com/~xiangfu/build-milkymist/milkymist-firmware-20120622-1303/ | 12:04 |
| kristianpaul | erghh seem neither fedora is building a qemu for lm32/milkymist.. :( | 12:32 |
| lekernel | yeah, and I've been asking them for a year or so... another little thing that frustrated me | 12:41 |
| lekernel | funnily enough it's included in qemu for mac os x | 12:42 |
| um4_ | Hi guys. First sorry, this is my last stupid question. The Milkymist one has arrived. All works fine but when I run a patch I don´t know how to return to the control panel& except pushing L-R buttons at the time. One hour testing and nothing... :| | 12:43 |
| lekernel | which is a great thing to show off to apple fanboys, but doesn't help so much in the end | 12:43 |
| lekernel | um4_: you are welcome to ask your questions. have you seen this? http://milkymist.org/wiki/index.php?title=Flickernoise_user_manual#keyboard_shortcuts | 12:44 |
| lekernel | ESC should work... | 12:45 |
| um4_ | Yes, I have spent three days reading them just to avoid this kind of questions. Not ESC, not right click, nothing works. I´m really sorry. | 12:47 |
| lekernel | meh | 12:47 |
| lekernel | xiangfu: did you break something? | 12:47 |
| lekernel | um4_: what version are you using? | 12:48 |
| lekernel | um4_: try Ctrl+ESC... | 12:49 |
| Fallenou | I think the wiki is out of date | 12:51 |
| Fallenou | it's not ESC nor right click anymore | 12:51 |
| lekernel | xiangfu changed this to Ctrl+ESC on March 27th. though if you are using the latest release (1.2) and not the git sources it should still be ESC | 12:51 |
| Fallenou | it has been changed to avoid miss-clicking and leaving performance mode when doing a big show :) | 12:51 |
| um4_ | soc/bios 1.2 flicker noise 1.2 patchpool installed 91 | 12:52 |
| lekernel | oh but of course, the git builds still have the 1.2 version tag... grmbl | 12:52 |
| GitHub193 | [flickernoise] sbourdeauducq pushed 1 new commit to master: http://git.io/Wg-DTw | 12:53 |
| GitHub193 | [flickernoise/master] Bump version number - Sebastien Bourdeauducq | 12:53 |
| lekernel | um4_: ctrl+esc should work. sorry about the mess. | 12:53 |
| um4_ | COOL& Ctrl+ESC, the only combination I haven´t tried. Sorry. No more stupid questions, I promise you. Thank you | 12:54 |
| lekernel | this wasn't a stupid question | 12:54 |
| lekernel | thanks for reporting this problem | 12:54 |
| um4_ | :) | 12:59 |
| xiangfu | great. wiki page update by 'Admin' :) | 12:59 |
| GitHub86 | [milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/_ibbag | 13:04 |
| GitHub86 | [milkymist-ng/master] framebuffer: control.For -> misc.IntSequence - Sebastien Bourdeauducq | 13:04 |
| kristianpaul | no need to promise either :) | 13:04 |
| GitHub127 | [migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/1edaec0d758c5e6853ce4685f711779fa43d5745 | 13:04 |
| GitHub127 | [migen/master] control.For -> misc.IntSequence - Sebastien Bourdeauducq | 13:04 |
| azonenberg | lekernel: so you seem to have more fpga debugging experience than me | 15:36 |
| azonenberg | i have a design that outputs status information to a bank of eight LEDs | 15:36 |
| azonenberg | Changing the (status bit -> LED) mapping seems to change the behavior of the circuit | 15:36 |
| azonenberg | preliminary looking at the PCB footprint suggests an electrical short should be impossible, the balls in question are very far away from each other (and are surrounded by other signals known to not be shorting) | 15:37 |
| azonenberg | and the traces never run near each other | 15:37 |
| wpwrak | turn it all off and measure the resistance ? shorts should be relatively easy to find | 15:39 |
| lekernel | did your design meet timing? | 15:43 |
| lekernel | do you have asynchronous logic? | 15:43 |
| lekernel | and yes... as wpwrak said, test the PCB (make a led blinker if you want... look at arduino.cc for inspiration) | 15:44 |
| Fallenou | troll troll | 15:45 |
| GitHub48 | [migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/a9fb0e4ab82e8820d536f0eecda841285f22164e | 15:45 |
| GitHub48 | [migen/master] doc: dataflow chapter structure - Sebastien Bourdeauducq | 15:45 |
| GitHub137 | [migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/bd4cc7fe47f3a1f7386a4ba6ed9d0248a66e4c4b | 16:05 |
| GitHub137 | [migen/master] doc: split rst file - Sebastien Bourdeauducq | 16:05 |
| GitHub142 | [milkymist-mmu] fallen pushed 4 new commits to mmu-bios: http://git.io/aZexxw | 17:18 |
| GitHub142 | [milkymist-mmu/mmu-bios] Removed useless assembly in itlb exception handler - Yann Sionneau | 17:18 |
| GitHub142 | [milkymist-mmu/mmu-bios] Add debug messages in ITLB exception handler - Yann Sionneau | 17:18 |
| GitHub142 | [milkymist-mmu/mmu-bios] Update DTLB tests to make them work with ITLB activated - Yann Sionneau | 17:18 |
| GitHub179 | [milkymist-mmu-simulation] fallen pushed 2 new commits to master: http://git.io/L93AcA | 17:19 |
| GitHub179 | [milkymist-mmu-simulation/master] Better reset code, fix a few undefined value problems - Yann Sionneau | 17:19 |
| GitHub179 | [milkymist-mmu-simulation/master] Do not refill I-Cache upon ITLB miss - Yann Sionneau | 17:19 |
| azonenberg | lekernel: http://i.imgur.com/xrwDm.png | 17:23 |
| azonenberg | actual data pulled off my MCB debugging | 17:23 |
| azonenberg | it looks to be working | 17:23 |
| Fallenou | congratz azonenberg :) | 18:22 |
| azonenberg | Fallenou: of course it also means i've found a bug in the xilinx datasheet | 18:23 |
| Fallenou | ahah | 18:23 |
| azonenberg | because my code breaks when i follow the timing in the datasheet | 18:23 |
| azonenberg | and works when i assume something happens combinatorially instead of being buffered | 18:23 |
| Fallenou | all those signals in your gtkwave have been "dumped" using your LA ? | 18:23 |
| azonenberg | Yep | 18:23 |
| Fallenou | and you trigger on "start" rising edge ? | 18:24 |
| azonenberg | that capture is using 105 of 128 channels | 18:24 |
| azonenberg | and yes | 18:24 |
| Fallenou | ok :) | 18:24 |
| azonenberg | actually there's 16 samples before the trigger | 18:24 |
| Fallenou | very nice | 18:24 |
| azonenberg | only two clocks are shown, i scrolled a little | 18:24 |
| Fallenou | I could need something like this to debug things on FPGA | 18:24 |
| Fallenou | when I cannot reproduce the bug on ISim (simulation) :) | 18:25 |
| azonenberg | Yeah, thats why i wrote it | 18:25 |
| azonenberg | did you see the googlecode link? | 18:25 |
| azonenberg | i have an alpha release out and am looking for people to test it | 18:25 |
| azonenberg | http://code.google.com/p/red-tin-logic-analyzer/downloads/list | 18:25 |
| Fallenou | thanks | 18:26 |
| azonenberg | the baud rate in the UART wrapper is hard coded for 500 Kbps at 20 MHz, to clock at a different speed you'll have to patch it | 18:26 |
| azonenberg | i forgot to add a parameter to do that :p | 18:26 |
| Fallenou | I won't have the time to test it unfortunately, unless I have some pesky bug I need to fix | 18:26 |
| azonenberg | No worries | 18:27 |
| azonenberg | just keep it in mind and if you do test it, let me know if you found it useful / found bugs / both | 18:27 |
| Fallenou | for sure you will know if I test it :) | 18:27 |
| azonenberg | ok :) | 18:27 |
| Fallenou | oh you even wrote a manual | 18:27 |
| Fallenou | I hope it's not too much documented, so that I will need to ask you questions ;) | 18:28 |
| azonenberg | Lol | 18:28 |
| azonenberg | I wrote the manual in one evening while doing some other stuff | 18:28 |
| azonenberg | So it might not be too complete :p | 18:28 |
| Fallenou | it looks pretty | 18:28 |
| azonenberg | <3 LaTeX | 18:29 |
| Fallenou | ;) | 18:29 |
| Fallenou | it seems ITLB is starting to work pretty nicely | 18:32 |
| Fallenou | maybe now it's working on real FPGA =) | 18:32 |
| azonenberg | http://pastebin.com/Ff6H6jnx | 21:38 |
| azonenberg | Does this look like bad RAM to you guys btw? | 21:38 |
| azonenberg | or SI issues? | 21:38 |
| azonenberg | or something else | 21:38 |
| wpwrak | SI or just bad sample timing come to mind | 23:16 |
| wpwrak | does the data bus do something else between writing and reading ? | 23:17 |
| wpwrak | (latex) real men love LaTeX ;-) | 23:18 |
| --- Sat Jun 23 2012 | 00:00 | |
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