#milkymist IRC log for Friday, 2012-06-22

azonenbergWoo, i now have an alpha of my internal LA ready to go02:00
azonenberghttp://code.google.com/p/red-tin-logic-analyzer/02:00
azonenbergwhoops i meant http://code.google.com/p/red-tin-logic-analyzer/downloads/list02:02
GitHub76[board-m1] adamwang pushed 1 new commit to master: https://github.com/milkymist/board-m1/commit/866c2de2d30396eb7b396df0e7d15cab8507a5b103:32
GitHub76[board-m1/master] added brand and classification name of fields and enable both for chips. - Adam Wang03:32
wolfspraulwhat's the difference between hard1 and keep1 in the fpga?06:06
wolfspraulhard1 ties a net to logic-high (hard0 to logic-low). but what is keep1?06:06
larscwolfspraul: in which context did you find those terms?06:46
lekernelit's for the (obsolete and buggy) keeper primitive07:48
GitHub58[board-m1] adamwang pushed 1 new commit to master: https://github.com/milkymist/board-m1/commit/d41a79098ce89bf7be7001b3cef7f6c579d4d92d07:53
GitHub58[board-m1/master] Power_Tree.sch: added info for FPGA block - Adam Wang07:53
lekerneljust ignore07:55
lekernelhow did you find it without ISE, by the way? :)07:55
wolfspraulwell I would still like to know what it was meant to be or once was08:00
wolfspraulthere seems to be something like a 'keep circuit' that I just don't know anything about, that's what I was getting at08:00
wolfspraulwhat does it mean electrically?08:03
wolfspraulor supposed to mean08:03
lekernel_now that FPGAs don't have internal tristates anymore, it doesn't mean anything08:55
wpwraktristate net maintaining its last driven state when nobody drives it anymore ?10:37
lekernelyes10:38
lekernelthis was obviously using a lot of power and causing timing problems... they dropped it now, along with the whole internal tristate idea10:39
lekernelalso having internal tristates means you cannot really use buffers for PIPs, only pass transistors - and enabling pass transistors adds capacitive load to a net and slows down the whole thing, making the timing model more complicated10:40
lekernelthere was also the problem of internal contention (which still exists now, but you need to fuck up the bitstream encoding, not just use the tools in the normal way)10:45
wpwrakoh, so they had a physical device doing that keeping. lovely :)10:47
GitHub49[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/67dc911788a76722aea383c8ce6da07757a82e7911:24
GitHub49[migen/master] examples/sim/dataflow: use new dataflow API (thanks Ross Manyika for reporting) - Sebastien Bourdeauducq11:24
GitHub159[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/8142c4f0d988242c0e5c2efc5f792356f378d4f712:00
GitHub159[migen/master] examples/dataflow/dma: use new dataflow API (thanks Ross Manyika for reporting) - Sebastien Bourdeauducq12:00
qi-botThe MMU firmware build was successful, see images here: http://fidelio.qi-hardware.com/~xiangfu/build-milkymist/milkymist-firmware-20120622-1303/12:04
kristianpaulerghh seem neither fedora is building a qemu for lm32/milkymist.. :(12:32
lekernelyeah, and I've been asking them for a year or so... another little thing that frustrated me12:41
lekernelfunnily enough it's included in qemu for mac os x12:42
um4_Hi guys. First sorry, this is my last stupid question. The Milkymist one has arrived. All works fine but when I run a patch I don´t know how to return to the control panel& except pushing L-R buttons at the time. One hour testing and nothing... :|12:43
lekernelwhich is a great thing to show off to apple fanboys, but doesn't help so much in the end12:43
lekernelum4_: you are welcome to ask your questions. have you seen this? http://milkymist.org/wiki/index.php?title=Flickernoise_user_manual#keyboard_shortcuts12:44
lekernelESC should work...12:45
um4_Yes, I have spent three days reading them just to avoid this kind of questions. Not ESC, not right click, nothing works. I´m really sorry.12:47
lekernelmeh12:47
lekernelxiangfu: did you break something?12:47
lekernelum4_: what version are you using?12:48
lekernelum4_: try Ctrl+ESC...12:49
FallenouI think the wiki is out of date12:51
Fallenouit's not ESC nor right click anymore12:51
lekernelxiangfu changed this to Ctrl+ESC on March 27th. though if you are using the latest release (1.2) and not the git sources it should still be ESC12:51
Fallenouit has been changed to avoid miss-clicking and leaving performance mode when doing a big show :)12:51
um4_soc/bios 1.2  flicker noise 1.2 patchpool installed 9112:52
lekerneloh but of course, the git builds still have the 1.2 version tag... grmbl12:52
GitHub193[flickernoise] sbourdeauducq pushed 1 new commit to master: http://git.io/Wg-DTw12:53
GitHub193[flickernoise/master] Bump version number - Sebastien Bourdeauducq12:53
lekernelum4_: ctrl+esc should work. sorry about the mess.12:53
um4_COOL& Ctrl+ESC, the only combination I haven´t tried. Sorry. No more stupid questions, I promise you. Thank you12:54
lekernelthis wasn't a stupid question12:54
lekernelthanks for reporting this problem12:54
um4_ :)12:59
xiangfugreat. wiki page update by 'Admin' :)12:59
GitHub86[milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/_ibbag13:04
GitHub86[milkymist-ng/master] framebuffer: control.For -> misc.IntSequence - Sebastien Bourdeauducq13:04
kristianpaulno need to promise either :)13:04
GitHub127[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/1edaec0d758c5e6853ce4685f711779fa43d574513:04
GitHub127[migen/master] control.For -> misc.IntSequence - Sebastien Bourdeauducq13:04
azonenberglekernel: so you seem to have more fpga debugging experience than me15:36
azonenbergi have a design that outputs status information to a bank of eight LEDs15:36
azonenbergChanging the (status bit -> LED) mapping seems to change the behavior of the circuit15:36
azonenbergpreliminary looking at the PCB footprint suggests an electrical short should be impossible, the balls in question are very far away from each other (and are surrounded by other signals known to not be shorting)15:37
azonenbergand the traces never run near each other15:37
wpwrakturn it all off and measure the resistance ? shorts should be relatively easy to find15:39
lekerneldid your design meet timing?15:43
lekerneldo you have asynchronous logic?15:43
lekerneland yes... as wpwrak said, test the PCB (make a led blinker if you want... look at arduino.cc for inspiration)15:44
Fallenoutroll troll15:45
GitHub48[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/a9fb0e4ab82e8820d536f0eecda841285f22164e15:45
GitHub48[migen/master] doc: dataflow chapter structure - Sebastien Bourdeauducq15:45
GitHub137[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/bd4cc7fe47f3a1f7386a4ba6ed9d0248a66e4c4b16:05
GitHub137[migen/master] doc: split rst file - Sebastien Bourdeauducq16:05
GitHub142[milkymist-mmu] fallen pushed 4 new commits to mmu-bios: http://git.io/aZexxw17:18
GitHub142[milkymist-mmu/mmu-bios] Removed useless assembly in itlb exception handler - Yann Sionneau17:18
GitHub142[milkymist-mmu/mmu-bios] Add debug messages in ITLB exception handler - Yann Sionneau17:18
GitHub142[milkymist-mmu/mmu-bios] Update DTLB tests to make them work with ITLB activated - Yann Sionneau17:18
GitHub179[milkymist-mmu-simulation] fallen pushed 2 new commits to master: http://git.io/L93AcA17:19
GitHub179[milkymist-mmu-simulation/master] Better reset code, fix a few undefined value problems - Yann Sionneau17:19
GitHub179[milkymist-mmu-simulation/master] Do not refill I-Cache upon ITLB miss - Yann Sionneau17:19
azonenberglekernel: http://i.imgur.com/xrwDm.png17:23
azonenbergactual data pulled off my MCB debugging17:23
azonenbergit looks to be working17:23
Fallenoucongratz azonenberg :)18:22
azonenbergFallenou: of course it also means i've found a bug in the xilinx datasheet18:23
Fallenouahah18:23
azonenbergbecause my code breaks when i follow the timing in the datasheet18:23
azonenbergand works when i assume something happens combinatorially instead of being buffered18:23
Fallenouall those signals in your gtkwave have been "dumped" using your LA ?18:23
azonenbergYep18:23
Fallenouand you trigger on "start" rising edge ?18:24
azonenbergthat capture is using 105 of 128 channels18:24
azonenbergand yes18:24
Fallenouok :)18:24
azonenbergactually there's 16 samples before the trigger18:24
Fallenouvery nice18:24
azonenbergonly two clocks are shown, i scrolled a little18:24
FallenouI could need something like this to debug things on FPGA18:24
Fallenouwhen I cannot reproduce the bug on ISim (simulation) :)18:25
azonenbergYeah, thats why i wrote it18:25
azonenbergdid you see the googlecode link?18:25
azonenbergi have an alpha release out and am looking for people to test it18:25
azonenberghttp://code.google.com/p/red-tin-logic-analyzer/downloads/list18:25
Fallenouthanks18:26
azonenbergthe baud rate in the UART wrapper is hard coded for 500 Kbps at 20 MHz, to clock at a different speed you'll have to patch it18:26
azonenbergi forgot to add a parameter to do that :p18:26
FallenouI won't have the time to test it unfortunately, unless I have some pesky bug I need to fix18:26
azonenbergNo worries18:27
azonenbergjust keep it in mind and if you do test it, let me know if you found it useful / found bugs / both18:27
Fallenoufor sure you will know if I test it :)18:27
azonenbergok :)18:27
Fallenouoh you even wrote a manual18:27
FallenouI hope it's not too much documented, so that I will need to ask you questions ;)18:28
azonenbergLol18:28
azonenbergI wrote the manual in one evening while doing some other stuff18:28
azonenbergSo it might not be too complete :p18:28
Fallenouit looks pretty18:28
azonenberg<3 LaTeX18:29
Fallenou;)18:29
Fallenouit seems ITLB is starting to work pretty nicely18:32
Fallenoumaybe now it's working on real FPGA =)18:32
azonenberghttp://pastebin.com/Ff6H6jnx21:38
azonenbergDoes this look like bad RAM to you guys btw?21:38
azonenbergor SI issues?21:38
azonenbergor something else21:38
wpwrakSI or just bad sample timing come to mind23:16
wpwrakdoes the data bus do something else between writing and reading ?23:17
wpwrak(latex) real men love LaTeX ;-)23:18
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