#milkymist IRC log for Saturday, 2012-06-16

azonenbergwpwrak: yes, that is annoying01:31
azonenbergi understand the need for load balancing01:31
azonenbergbut that can be done server side01:31
azonenbergwolfspraul: also, initial UI mockup for the control panel http://i.imgur.com/xGozm.png01:31
azonenbergkristianpaul: *01:31
azonenbergyou'd use this to dial in what signals you're watching (a future, more advanced version may be able to parse HDL but thats a much longer term project)01:32
azonenbergthen specify trigger conditions01:32
azonenbergthen hit the "start" button01:32
wpwraki think they don't do it for load balancing but for page impressions01:32
azonenbergonce the trigger condition occurs, it'll launch gtkwave with the data of interest01:32
wpwraknext step: protocol decoding :)01:33
azonenbergwpwrak: thats up to gtkwave01:33
azonenbergmake a plugin for it01:33
azonenbergmy job is just to get data from the board into a .vcd file01:33
azonenbergand launch $VCD_VIEWER (currently gtkwave) to render it01:33
wpwrakah, gtkwave can do such things ? didn't know that01:33
azonenbergI dont know if it can01:34
azonenbergwhat i do know is, that's beyond the scope of the LA01:34
azonenbergi'm doing capture and transport01:34
wpwrak;-)01:34
azonenbergnot the presentation layer01:34
wpwrakat some point, you may want to add protocol triggers ...01:34
azonenbergGood point01:34
azonenbergThats a much longer term project though01:34
azonenbergThe trigger systm i have now is adequate for catching the single bug i'm developing the tool for01:35
wpwrakdo you stream to DRAM ? or just keep it in the tiny FPGA memory ?01:35
azonenbergonce i have it finished to the point that i can use it, i'll then use it to catch my bug01:35
azonenbergRight now, i use four block RAMs01:35
azonenbergeach 32 bits wide x 512 bits deep01:35
azonenbergto get 128 channels x 512 samples01:35
wpwrakthat's not a lot :-(01:35
azonenbergYou could make it deeprr01:35
azonenbergremember this is better than a normal LA for fpga stuff since you are capturing on a clock01:36
azonenbergso you dont need to oversample unless you're looking for glitches01:36
azonenbergso 512 samples = 512 clocks01:36
wpwrakthe very shallow sample memory is a problem of all those cheap fpga-based LAs01:36
azonenbergThis isnt meant to replace a conventional LA01:36
azonenbergthis is meant to replace chipscope01:36
azonenbergand i cant stream to dram01:36
azonenbergfor one very simple reason01:37
wpwrakyes, but if you want to analyze protocols, you need a lot of samples (and/or good idle detection)01:37
azonenbergi'm trying to fix a bug in my dram controller01:37
azonenbergusing this tool :p01:37
wpwrakheh ;-)01:37
wpwraki see the catch 22 :)01:37
azonenbergSo block ram is a necessity lol01:37
azonenberga dram based back end is a possibility for a future version01:37
azonenbergas a plugin01:37
wpwrakmaybe you can extend it once the dram bug is fixed :)01:37
azonenbergi want to make it highly modular01:37
azonenbergi'm already setting it up so the PC interface is modular01:37
azonenbergthe interface implemented right now is a uart at 500kbps but that can be swapped out with usb, ethernet, jtag, etc potentially01:38
azonenbergthough uart is the only one i'm implementing in the short term01:38
azonenberg64 kbits * 500kbps  = fraction of a second01:38
azonenbergso its not a bottleneck01:38
azonenbergyou could always use more block ram too01:38
azonenbergbut this is meant to be a minimally invasive debugging solutoin01:39
azonenbergthat you can throw in almost anywhere01:39
azonenbergthe current system including a 32-bit counter (my DUT) and the UART01:39
azonenberguses less than 100 spartan6 slices and four block rams01:39
wpwrakyeah. i'm more after a general LA. deep memory, and a speedy link to the host. with M1, we have everything one would need to make such a critter.01:42
azonenbergwpwrak: yeah01:43
azonenbergAnd i want to do something like that TOO01:43
azonenbergBut my goal right now is to make something useful for fpga debugging01:43
azonenbergwhere you can't simulate for some reason01:44
wpwraksure. one piece at a time :)01:44
azonenbergand you dont want to break out to GPIOs and hook up to a regular LA01:44
azonenbergeither for lack of GPIOs or lack of a LA or whatever01:44
azonenbergor in my case lack of a sufficiently fast LA01:44
wpwrakyup. an integrated LA is certainly good to have01:44
azonenbergSo i dont wnat to have for example super sophisticated triggering systems01:45
azonenbergas that would either make it slower or bigger01:45
azonenbergboth are counterproductive in this case01:45
azonenbergi also dont want it so complex i have to spend a long time debugging it01:46
wpwrakso you're not taking the zen approach :)01:50
azonenbergwhich is that?01:50
wpwrak"the way is the goal"01:51
azonenbergThis is a tool, not one of my main projects01:51
azonenberga necessary step on the road toward world domination is to be able to debug your robot army :p01:52
wpwrakthat's a good point01:52
kristianpaulazonenberg: nice02:02
kristianpaultought i personally will follow a simpler aprouch02:02
azonenbergkristianpaul: how so02:02
kristianpaullike just logging the uart to a log02:02
azonenbergOh02:02
azonenbergThis is meant for raw data dumps though02:02
azonenbergand it captures in real time at high speed and then dumps slowly02:03
kristianpaulbut yeah i recalled that02:03
kristianpaulremenber*02:03
azonenbergand integrates nicely with gtkwave for plotting signals :)02:03
azonenbergsure, there are other ways to solve the same problem02:03
kristianpaulyes sure02:03
azonenbergbut i think this one will work well for a lot of applications02:03
kristianpauland is okay, i like gtkwave at the end02:03
kristianpaulsure it is02:04
kristianpaulwell i'll just need 3 channel02:06
azonenbergLol well i'm trying to debug a memory bus02:07
kristianpauli know :)02:07
azonenbergso i have ~25 bits of address, 32 of data, and a few other things02:07
kristianpaulyeah i can imagine02:07
azonenberghttp://www.eejournal.com/archives/articles/20080212_lattice/02:08
azonenbergmight find that interesting02:08
wolfspraulazonenberg: nice project indeed, good luck with polishing/blog etc! You may want to tell the sigrok folks about it (sigrok.org). do you know sigrok? they have different hw&sw right now, mostly, but they might be interested in your LA.02:47
azonenbergwolfspraul: no, i dont know them03:30
wolfspraulit's led by our good friend Uwe Hermann in Germany, and I hope they stick to it for a while and make the software really solid03:38
wolfspraulthese are just little toys right now, maybe good for serial, low-speed usb, etc. your LA comes from a different level :-)03:38
lekernelah, I just proposed sigrok as well :)09:15
lekernelwpwrak: do you think kicad would be good enough for the whole m^3 board (schematics+routing)?12:14
wpwrakschematics certainly, yes. routing, no sure. i haven't done any multilayer (> 2) work with it yet. some people have and their results don't look all bad, though.12:18
wpwrakso i think it would be at least worth trying. you also have "Freeroute" as a fallback option12:19
lekernelworth giving it a try then?12:19
lekernelhttp://www.freerouting.net/ ?12:19
wpwrakyeah, that one12:20
lekernelhuh, weird one12:20
wpwrakugly SaaS12:21
wpwrakbut it seems to work okay. tried it a bit a long time ago12:21
wpwraksomeone should write a proper open source router for kicad. kicad helps with manual routing (DRC while you draw; "magnetic" off-grid points), but it's still relatively painful work12:25
wpwrakthanks to adam, we now also have a fairly sizable symbol and footprint library. still needs a bit of ordering, though.12:28
lekernelgood12:28
lekernelI think we have some chance of completely getting rid of the ugly altium finally :)12:34
wpwrakyeah. that will be a day worth celebrating :)12:48
wpwrakhave you looked at the kicad schematics adam made for m1r4 ? they're very clean. much nicer than the altium version.12:49
lekernelyes, I had a look at them. and I share your opinion13:16
lekernelthat's why I'm looking forward to a 100% kicad m^313:16
wpwrakexcellent :)13:18
qi-botThe MMU firmware build was successful, see images here: http://fidelio.qi-hardware.com/~xiangfu/build-milkymist/milkymist-firmware-20120616-1504/14:05
Fallenouhehe nice auto build :)14:29
Fallenouthe url is wrong but the files are there : http://fidelio.qi-hardware.com/~xiangfu/build-milkymist/milkymist-firmware-mmu-20120616-1504/14:29
GitHub173[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/bde8361e193038f07dff94398ac9fb8e06186c3015:33
GitHub173[migen/master] flow: insert combinators and infer plumbing layout - Sebastien Bourdeauducq15:33
GitHub161[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/5c139511e888218731c59a4a51248a13683197db17:26
GitHub161[migen/master] examples/flow/arithmetic: simulate - Sebastien Bourdeauducq17:26
GitHub187[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/c1450daa93ac2013115635841b3a7d49a9452c9419:25
GitHub187[migen/master] flow: insert splitters - Sebastien Bourdeauducq19:25
GitHub126[migen] sbourdeauducq pushed 7 new commits to master: https://github.com/milkymist/migen/compare/c1450daa93ac...21eb17fc362120:43
GitHub126[migen/master] examples/flow/arithmetic: cleanup - Sebastien Bourdeauducq20:43
GitHub126[migen/master] flow/actor: add single_sink/single_source retrieval methods - Sebastien Bourdeauducq20:43
GitHub126[migen/master] flow/actor: fix busy signal generation for pipelined actors - Sebastien Bourdeauducq20:43
--- Sun Jun 17 201200:00

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