#milkymist IRC log for Friday, 2012-06-15

GitHub36[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/da522cd58d86713b93da1e5f49b0f280a5f3524515:54
GitHub36[migen/master] Abstract actor graphs - Sebastien Bourdeauducq15:54
azonenbergJust curious, how do you guys typically debug?16:55
azonenbergSimulation? Observe actual behavior in hardware? Break signals out to GPIOs and use a LA? Chipscope? All of the above?16:55
azonenbergi'm trying to debug some of my code that uses DRAM and thus would be difficult to downclock, and it's too big to simulate in the free ISim at a reasonable speed16:58
azonenbergand its too fast for my LA16:58
kristianpaulI use most the scope and cheap LA (not very often)16:59
kristianpaulfor the rest i let software debug hw16:59
azonenbergSo i decided to build my own internal LA similar to chipscope, it currently has 128 channels and programmable triggers (rising, falling, low, and high on each of 128 channels, AND the results together and OR with external trigger)16:59
azonenberglogs 512 samples to block RAM on a provided clock16:59
kristianpauloh ho16:59
azonenbergthen dumps over a UART and renders in gtkwave16:59
azonenbergfirst successful capture http://i.imgur.com/V911H.png16:59
kristianpaulsharing is caring azonenberg :-) (ABout internal LA)17:00
azonenbergif anybody is interested once i polish the toolchain a bit i'll be looking for beta testers, it's BSD licensed17:00
azonenbergor will be once i post it somewhere public, right now its just a directory on my laptop :P17:00
azonenbergThink you guys would find it useful?17:00
kristianpaulyes of course, have an alternative to chipscope is AWESOME17:01
azonenbergon spartan6 -3 it can get up to almost 200 MSa/sec (180 i think) and if you cut the number of channels to 64 or 32 it would be even faster17:01
kristianpauldunno if it can buffer bunch of stuff for usb debugging17:01
azonenberguses four block ram and a few dozen slices17:01
azonenbergThe current implementation has 512 samples deep memory but that would be easy to tweak17:01
kristianpaulit have its own uart code that how fast?17:02
azonenbergits not fully parameterizable yet, thats one of the things i plan to tweak before release17:02
azonenbergIt uses the open source uart core i wrote a while ago17:02
azonenbergi didnt like the opencores ones since they were wishbone and i needed native interface17:02
kristianpaulu said toolchain, u mean it run a minisoc or such?17:02
azonenbergthere's four components to it17:02
azonenbergfirst is the core LA17:02
azonenbergwhich is trigger and a dual ported block ram17:02
azonenbergsecond is the wrapper that, when the LA asserts DONE, dumps to the PC over some interface17:02
azonenbergright now that's a uart at 500 Kbps but you could replace it with usb, ethernet, etc easily17:03
azonenbergthird is a short C++ program that takes data from the uart and reformats it into a standard .vcd file, taking the 128-bit raw samples and splitting them up according to the signals you defined (buttons and count in this screenshot)17:04
azonenbergthen fourth is the waveform viewer, i'm using an existing tool (gtkwave) for that17:04
kristianpaullooks simple, good17:04
azonenbergits all modular so by replacing blocks 2 and 3 you could easily adapt it to any interface other than uart17:04
azonenberguart is what i had on this board17:04
azonenbergplus 100mbit ethernet but i dont have HDL to interface to it yet17:04
azonenbergthe big thing left to do before a v0.1 alpha release is to make component 3 a little more polished17:05
kristianpaulbut 512 samples, is just fifo, ring buffer?17:05
azonenbergfor example don't hardcode /dev/ttyUSB017:05
kristianpauli mean it just sample 512 and stop?17:05
azonenbergand dont hardcode the channel-to-signal mappings17:05
azonenbergand allow trigger to be updated at run time rather than hardcoded on the FPGA17:05
azonenbergIt samples continually17:05
azonenbergin a ring buffer17:05
azonenbergthereare three pointers17:05
azonenbergstart, write, and stop17:06
azonenbergin the "waiting for trigger" state, write is start+1617:06
azonenbergand stop is start+51217:06
azonenbergonce triggered, start and stop freeze17:06
azonenbergand it stops capture when write = stop\17:06
kristianpaulpublish publish ! (and blog about it ;_)17:06
azonenbergso you get 16 samples before trigger and (512-16) after17:06
azonenbergthen once the wrapper has sent the data tothe PC it resets the LA17:07
azonenbergso you can capture again17:07
azonenbergin my screenshot i had the trigger set as rising edge of buttons[0]17:07
azonenbergthe red cursor is at the trigger point17:07
lekernelazonenberg: why not use the milkymist dram controller?17:07
azonenberglekernel: thats irrelevant, the code is in my bridge between the CPU and the dram17:07
azonenbergnot the MCB17:08
azonenbergthe bug*17:08
lekernelah, you're using the MCB17:08
azonenbergi intend to try using it in the future17:08
azonenbergit should be drop-in for the MCB if i rewrite the bridge17:08
azonenbergthe problem i have now is that the bridge is occasionally losing data or something like that (hangs)17:08
azonenbergand i cant clock it any slower17:08
azonenbergand the MCB primitive wont simulate in isim lite17:08
azonenbergand i dont have a chipscope license17:08
azonenbergsolution? make my own17:08
kristianpaulokay i got lost, i need a cpu to "run" or can be indepent?17:09
azonenbergThis is completely standalone17:09
azonenbergyou have two modules17:09
azonenbergRedTinLogicAnalyzer is the core17:09
lekernelif you used the milkymist dram controller, you would not have simulation problems17:09
azonenbergthen (unnamed wrapper thats currently part of my testbench) reads the data from that into a PC interface such as a uart17:09
azonenbergyou could even log to SD if you didnt have a pc handy17:09
lekerneland it can work at any frequency (if you disable the DLL in the DRAM)17:10
azonenbergand then analyze the capture later17:10
azonenberglekernel: interesting but isim still has a 50k line limit17:10
lekernelthen use iverilog17:10
azonenbergwhich i will hit sooner or later17:10
azonenbergprobably sooner17:10
azonenbergI intend to explore that17:10
lekernelor verilator, if you need speed (it's faster than modelsim)17:10
azonenbergIn any case that's all irrelevant, the point is i'm workign on this tool and i'll have an alpha out for you guys to play with soon17:10
azonenbergand its free software17:10
kristianpaulirrelevant, agreed !17:11
azonenbergI'll be polishing it for another day or two and then release an alpha on google code probably this weekend some time17:11
lekernelyeal, but I'm always puzzled why you're always reinventing wheels :)17:11
azonenbergwhen that happens i'll do a short blog post on it17:11
azonenberglekernel: chipscope or the MCB?17:11
lekernelthe MCB stuff17:11
lekerneland the CPU17:11
azonenbergmcb, because i had been using it before i knew your controller existed17:11
azonenbergcpu, because i like mips and there's no good open source mips core out there17:11
azonenbergplasma is so-so (3 stage pipeline and slow), mine is meant to go faster17:12
lekernelwhat advantage does mips have over lm32?17:12
azonenbergi have an existing codebase for it with lots of asm17:12
azonenbergthats really the main reason17:12
kristianpaulasm, urgh ;-)17:12
azonenbergi was working on pic32 and outgrew its RAM capacity17:12
lekernelhaving lots of asm is also reinventing wheels and is evil17:12
azonenbergits a kernel17:12
azonenbergnot really an alternative for asm in context switching etc17:13
azonenbergand i'm doing my thesis work on OS architecture and such so i need a cpu/os that is bare bones and simple to modify17:13
azonenberglinux is a little too big to be easy to make sweeping changes to17:13
lekernelthat's not what i'd call "lots of asm"... it's much faster to rewrite that context switch code for LM32 than reinvent yet another open source softcore17:13
lekernelor use an existing kernel and reinvent one wheel less17:13
lekernelnuttx is pretty good17:14
azonenbergi also wanted practice in cpu design17:14
azonenbergbefore i went on to the NEXT stage of my research which will involve major cpu architecture changes17:14
azonenbergand chipscope, well...17:14
azonenbergthere is no open source alternative that i could find17:14
azonenbergso it was a pretty simple decision17:14
lekernelyeah, I don't question the chipscope alternative.17:14
lekerneltbh this is your first FPGA project that I find interesting17:15
azonenbergwell if you dont like my cpu you dont have to use it :p17:15
azonenbergMost of my other projects were done to get experience with the technology and learn17:15
azonenberglike the cpu17:15
kristianpaulwhat compile pic32 uses gcc?17:16
azonenbergi wanted to learn more about how to build an efficient pipelined microarchitecture given the instruction set but no details of how to implement it17:16
azonenbergkristianpaul: yes17:16
azonenbergits a fork of gcc with some pic-specific patches17:16
azonenbergthat arent in mainline yet17:16
azonenbergbut it is gcc and you can get source17:16
kristianpauland libc?17:16
azonenbergproprietary libc i think on pic3217:16
azonenbergi didnt use it17:16
azonenbergmy core is designed to work with mainline gcc plus a custom linker script for my memory map17:16
azonenbergmipsel-elf target17:16
Action: kristianpaul loves mainline word17:17
kristianpaullekernel: so he basically same you did with navre, you are fair now ;-)17:17
kristianpaulbasically did*17:17
azonenbergthe original goal was to take my existing tens of thousands of lines of pic32 code17:18
azonenbergand move it onto a similar platform with more ram17:18
lekernelsure, I don't have to use it, but all your wheel-reinventing of stuff we have already done here always reminds me of this presentation http://mako.cc/talks/20110402-when_fs_isnt_better/wfsib-SLIDES.pdf17:18
azonenbergsaw it already17:18
kristianpaulazonenberg: why you dont use wishbone?17:19
lekernelkristianpaul: AVR and MIPS/LM32/etc. are different. and there was no good AVR-like CPU available.17:19
azonenbergkristianpaul: for my low-end designs i wanted something simple and SRAM-esque17:20
lekernelkristianpaul: if you look at the project's history, you'll see that I have tried ZPU and other crappy small softcores before17:20
azonenbergthe mips is getting fast enough that i probably will want a "real" bus on it at some point17:20
azonenbergwishbone is on the list17:20
azonenbergthis is my first design that's needed to deal with DRAM17:20
azonenbergJust created a google code project for it btw, http://code.google.com/p/red-tin-logic-analyzer/17:22
azonenbergwill be pushing my code to it later today17:22
kristianpaulerghh google just changed again project feeds urls..17:22
lekerneland of course, you trusted the Milkymist DRAM controller even less than e.g. NASA did, and you went for the proprietary MCB which is causing you trouble now :)17:23
azonenberglekernel: the mcb is actually not giving me any trouble17:23
azonenbergits the bridge between it and my code17:23
azonenbergi'm overrunning their fifos17:23
azonenbergand i cant figure out why17:23
kristianpaulNASA, ahh  did they finally crashed because of it? ;-)17:23
lekernellast time I heard from it (a month ago actually) they were happy with it.17:28
kristianpaulok, now are you happy that azonenberg is coding a LA that could help us debug MM SoC? :-)17:29
lekernelyeah, this is good news :)17:29
FallenouI wonder why people still use google code17:47
FallenouI find the UI ugly17:47
Fallenouand it seems to be using svn instead of git17:48
Fallenouis it possible to use git with it ?17:48
azonenbergYou can use git, svn, or hg17:49
azonenbergi prefer svn17:49
Fallenouoh ok, nice17:52
Fallenounice project your LA17:52
azonenbergLol well it isnt done yet17:55
azonenbergand there's absolutely zero documentation atm :p17:55
FallenouI mean the way you describe it, it sounds like a nice tool :)18:01
azonenbergI'd prefer to say "it's going to be nice" :p18:02
azonenbergright now its a work in progress lol18:02
azonenbergi just synced my repo over to the google code and will be doing future development there18:02
azonenbergnext step is going to be removing some of the hard-coded config and making it more tweakable18:03
Fallenouwell good luck to continue/finish it !18:06
larscFallenou: the problem is the sf gui is even more ugly20:05
FallenouI agree20:07
FallenouI kind of like gitorious and github20:07
larscand github is nice but has become pretty bloated with lots of js20:07
larscgitorious is ok20:07
FallenouI guess it's bloated, but it still runs fine on my laptop20:08
wpwrakthe gui is the least of sf's problems. the main issue is its download system that doesn't let you have direct links. well, you can circumvent it by putting your files in the web space, but i'm not sure if they'd tolerate that for busy projects21:58
lekerneljs is teh hype!22:22
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