#milkymist IRC log for Sunday, 2012-06-10

GitHub40[migen] sbourdeauducq pushed 3 new commits to master: https://github.com/milkymist/migen/compare/009f26b...ec501e714:42
GitHub40[migen/master] examples/dataflow: only import nx when needed - Sebastien Bourdeauducq14:42
GitHub40[migen/master] bus/wishbone/Tap: remove ack feature - Sebastien Bourdeauducq14:42
GitHub40[migen/master] bus/wishbone: target model - Sebastien Bourdeauducq14:42
GitHub170[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/b7a84b37501ac3426af8fb843e278ccf73faa11b15:37
GitHub170[migen/master] wishbone: base TargetModel class - Sebastien Bourdeauducq15:37
Action: Fallenou started ITLB part, fearing first test15:40
Fallenouit's gonna blow !15:40
Action: lekernel is preparing an army of simulation modules to help when the dataflow + asmi blows up15:47
Fallenouhehe15:47
Fallenouok let's try ITLB15:48
Fallenoufire in the whole !15:48
Fallenouhum ok it does not blow, but does it really work ?15:48
Fallenoulet's try a more difficult mapping than map(f, f); f();15:49
wpwrakit's better if it doesn't work on the first try. otherwise, you'll be endlessly suspicious about it16:03
Fallenouwith map(f, some_address);  some_address(); it blows :)16:03
FallenouI am trying inserting a few nops() between ITLB activation and the actual "call" to the function16:04
Fallenouit does not work any better, I should go back to simulation16:06
Fallenouok enough playing around blindly with the FPGA, let's go back to ISim =(16:17
rohwpwrak: *g*16:19
rohwpwrak: i know that feeling... 'does it work? seems so... but do i trust it to stay that way?'16:20
wpwrakFallenou: there's no glory in too easy a victory :)16:28
Fallenouindeed, let say that :p16:31
FallenouI'm scratching my head to find out how to do enable ITLB in a clean way20:43
FallenouI have some code at physical page X, I map virtual page Y to physical page X20:44
Fallenouif I do something like wcsr tlbctrl, ENABLE_ITLB then call Y20:44
Fallenouand let say instructions after the "call Y" are : inst_A inst_B20:45
Fallenouit will page fault when fetching inst_B20:45
Fallenoucause there is no mapping for the page which is executing (in the kernel space)20:46
Fallenouthe cpu will fetch inst_A and inst_B anyway, even if there is a "call Y" instruction20:46
Fallenouthey won't be executed though (inst_A and inst_B)20:46
Fallenouhow can I prevent this kind of page fault which should not occure20:47
FallenouI could add a mapping for the code currently running (the kernel code which enables the ITLB) but it's not clean and it could/will generate bugs, for instance if the user space application is using the exact same virtual address for something20:48
FallenouI could delay the effect of the wcsr ... and acutally enable ITLB only 2 instruction later20:50
Fallenoulet's try that :o20:50
Fallenouhum hum it fetches the correct translated addresses now :)21:25
Fallenoubut after fetching a few instructions it generates a page fault21:25
Fallenouwithout changing of page :o weird21:25
Fallenouit seems ld is not happy with me using "bi" instruction22:21
Fallenouit works :)23:13
Fallenouat least I have one working example :p23:13
Fallenoubut it's a start !23:13
Fallenoulet's commit this23:13
GitHub179[milkymist-mmu-simulation] fallen pushed 1 new commit to master: http://git.io/GL1hOg23:21
GitHub179[milkymist-mmu-simulation/master] Add a draft of ITLB to Milkymist MMU - Yann Sionneau23:21
GitHub115[milkymist-mmu] fallen pushed 2 new commits to mmu-bios: http://git.io/koOaoQ23:30
GitHub115[milkymist-mmu/mmu-bios] Add support for ITLB in simulation BIOS - Yann Sionneau23:30
GitHub115[milkymist-mmu/mmu-bios] Add a simple test for ITLB in simulation BIOS - Yann Sionneau23:30
Fallenougn8!23:31
Fallenouhi xiangfu !23:31
xiangfuFallenou, Hi23:31
Fallenouhow are you ?23:32
xiangfufine. :)23:32
xiangfurecently don't have time working on m1.23:33
Fallenoucongratz for your latest openwrt sync with upstream on the ben :)23:34
Fallenouyeah I saw that23:34
Fallenoubut you seemed to have been busy ;)23:34
xiangfuyes.23:38
xiangfuFallenou, what about add 'milkymist-mmu' to build host?23:40
Fallenouwell why not23:41
xiangfumaybe I try to add build 'milkymist-mmu' to buildhost (http://fidelio.qi-hardware.com/~xiangfu/build-milkymist/)23:41
xiangfuyes.23:41
xiangfuthen people can easy try milkymist-mmu-firmware.23:41
Fallenouyes sure it could be great :)23:42
Fallenouin this repo on the "mmu" branch you have both the verilog for an mmu-enabled bitstream23:42
Fallenouand the mmu enabled BIOS23:42
Fallenouso you just need to build the bitstream (system.bit AFAIK) and the bios.elf/bios.bin23:43
FallenouI didn't touch flickernoise nor rtems at all23:43
FallenouI'm only playing with the BIOS23:44
Fallenouxiangfu: oh but beware, you need a modified "lm32-binutils"23:45
xiangfugreat. will make it working in next few hours.23:45
Fallenouin your build script you should update your PATH to use my modified lm32-binutils23:45
Fallenouhttps://github.com/fallen/lm32-binutils-mmu23:45
xiangfuFallenou, "lm32-binutils" is there a patch for that?23:45
xiangfuok. I will use your repo about lm32-binutils23:46
Fallenouit's only a few commits23:46
Fallenouit could be distributed as a small patch23:46
xiangfu(Restart your GNOME/KDE/Mac OS/awesome/whatever session). I am using 'awesome' :-)23:47
xiangfuFallenou, I will use your repo. so if there is new commit. it will trigger a new build.23:48
Fallenouhehe :)23:50
Fallenoume too at the office23:51
Fallenoumake sure you don't overwrite your current lm32-binutils with my modified one23:53
Fallenouuse a different --prefix=23:53
Fallenouthank you for setting that up !23:53
Fallenougoing to sleep, it's late here23:53
Fallenousee you !23:53
xiangfugood night.23:55
--- Mon Jun 11 201200:00

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