kristianpaul | xiangfu: do i need to apply all werner patches? | 01:56 |
---|---|---|
kristianpaul | Morning btw ! | 01:56 |
xiangfu | kristianpaul, yes. apply all werner patches. | 01:57 |
kristianpaul | gee | 01:57 |
kristianpaul | no matter order? | 01:58 |
sb0 | what patches? | 01:58 |
kristianpaul | hi | 01:58 |
sb0 | rtems? | 01:58 |
kristianpaul | yes | 01:58 |
sb0 | some of them are already merged | 01:58 |
sb0 | use the quilt file, it should be up to date | 01:58 |
kristianpaul | ah where is it? | 01:59 |
Action: sb0 bothered some NASA engineers today about RTEMS bugs | 01:59 | |
xiangfu | kristianpaul, : http://projects.qi-hardware.com/index.php/p/wernermisc/source/tree/master/m1/patches/README | 02:00 |
sb0 | should be in the patch repository... and the readme file tells you how to run quilt | 02:00 |
kristianpaul | good | 02:00 |
kristianpaul | sb0: and?? ;-) what they said? | 02:00 |
kristianpaul | xiangfu: ah tricky thats another directory from yday u pointed.. | 02:01 |
kristianpaul | ah, fool me not reading werner one :) | 02:01 |
sb0 | it's basically that everyone's using it... | 02:02 |
kristianpaul | he, well long time since no compile rtems .... | 02:03 |
kristianpaul | okay compiling now.. gn8 | 02:11 |
kristianpaul | did nasa bother you about using milkymist soc in coming missions? ;) | 02:12 |
wolfspraul | nasa is using rtems or milkymist? | 02:14 |
wpwrak | sb0: how happy are they with it ? :) | 02:18 |
wpwrak | wolfspraul: hehe, we wish :) | 02:19 |
sb0 | they're using rtems and the milkymist dram controller (the old one) | 02:19 |
sb0 | actually I saw their board with the memory controller today :) | 02:20 |
sb0 | they're using some freaky space-qualified DRAM chips. hadn't seen DRAM like this before. | 02:20 |
sb0 | they're packaged in something between a QFP and a ceramic PGA, about 1cm high | 02:21 |
sb0 | http://www.electronicdesign.com/files/29/5765/figure_01.jpg | 02:25 |
wpwrak | wow. looks fancy :) | 02:28 |
wpwrak | when the aliens catch voyager, they'll think our computers are very bulky and slow, which will make them over-confident. their invasion fleet won't stand a chance. | 02:29 |
GitHub64 | [board-m1] adamwang pushed 1 new commit to master: https://github.com/milkymist/board-m1/commit/cb81048d2a0057e347a0b6b564665818d1c8abf0 | 03:36 |
GitHub64 | [board-m1/master] 1. split FPGA_P[1..2].sch into FPGA_BANK[0..3].sch and EXPANSION_RESET.sch - Adam Wang | 03:36 |
GitHub30 | [board-m1] adamwang pushed 1 new commit to master: https://github.com/milkymist/board-m1/commit/bff801f46e59f1a0aeba6ed65b3e1ca820e25a49 | 03:41 |
GitHub30 | [board-m1/master] split FPGA_P[1..2].sch into FPGA_BANK[0..3].sch and EXPANSION_RESET.sch - Adam Wang | 03:41 |
GitHub79 | [board-m1] adamwang pushed 1 new commit to master: https://github.com/milkymist/board-m1/commit/e3a19800e3ac1adf0832f6578a94c39242ff0d47 | 03:45 |
GitHub79 | [board-m1/master] remove FPGA_P[1..2].sch - Adam Wang | 03:45 |
cladamw | wpwrak, xiangfu could you git pull board-m1 to see if ERC without any err. thanks. :-) | 03:46 |
xiangfu | ok | 03:49 |
wpwrak | hmm, the LibDir change breaks my setup | 04:04 |
wpwrak | let's fix that ... | 04:04 |
wpwrak | 0 troubles | 04:05 |
cladamw | "LibDir" ? | 04:06 |
wpwrak | this one :) | 04:06 |
GitHub39 | [board-m1] wpwrak pushed 1 new commit to master: https://github.com/milkymist/board-m1/commit/0d28a62ddedd2331c9c6702ad1c57fa011c01e41 | 04:06 |
GitHub39 | [board-m1/master] r4/m1.pro: keep ../../kicad-libs/components in LibDir - Werner Almesberger | 04:06 |
cladamw | if i git pull, will my LibDir then doesn't find ? | 04:07 |
wpwrak | no no. you'll be fine | 04:10 |
wpwrak | when adding the local ../components, you accidently removed the ../../kicad-libs/components | 04:10 |
wpwrak | i put it back | 04:10 |
cladamw | hmm ? i didn't manually add the local in m1.pro text file but used eeschema. :) | 04:12 |
cladamw | wpwrak, i tried to embellish the rules wiki to do such better schematics same as gta02-core. hope you like. Now they should be easier to more readable. :-) | 04:14 |
cladamw | the wiki should continue to add, set common rules whenever we think rules are good for read. :) | 04:16 |
wpwrak | (edit m1.pro) yeah, kicad can sometimes do strange things to that file | 04:25 |
wpwrak | (rules) excellent ! let's see ... | 04:25 |
wpwrak | on MiscControl.sch, the DMX zeners look a bit confusing because of the package. | 04:33 |
wpwrak | hah ! and the pin names in the oscillator are in a 40 mil font ;-) | 04:35 |
wpwrak | not sure if you want to change that, though. the whole component looks very nicely drawn. changing the font size may mess this up. | 04:35 |
wpwrak | the USB series resistors (R136, R137, etc) are very close. how about moving the resistor value into the symbol ? | 04:37 |
wpwrak | hmm, at 60 mil, that looks bad, too :( | 04:37 |
wpwrak | in Audio.sch, the connectors have ground looping up. that looks a bit odd. it may be clearer to just make ground cross the other pins close to the connector. like on J1 | 04:43 |
wpwrak | that's all i found at a quick glance :) | 04:47 |
wpwrak | overall, it looks very good. congratulations ! even the FPGA doesn't look so intimidating anymore ;) | 04:48 |
wolfspraul | xilinx is pushing their zynq chips very much | 12:13 |
wolfspraul | those are chips that have for example two cortex a9 arm cores + 85k cells fpga fabric + ddr3 + spi/nand/nor... | 12:14 |
wolfspraul | is this of interest to us/milkymist? | 12:14 |
wolfspraul | what if some of those chips are more easily available and/or cheaper than fpga-only chips? | 12:15 |
Fallenou | well it's of interest if we want to replace all the open source ip cores by proprietary hard-burned ip ^^ | 12:16 |
Fallenou | it could certainly increase performance, but will decrease the added value of the project | 12:17 |
Fallenou | (and 85k cells is really small) | 12:17 |
wolfspraul | the only reason I bring up the discussion is to unite the community :-) | 12:25 |
wolfspraul | so we have to be clear on what we want or don't want, and for what reason | 12:25 |
wolfspraul | luckily I think we have a relatively coherent philosophy here, which is: | 12:26 |
wolfspraul | #1 make it work now and do something useful now | 12:26 |
wolfspraul | #2 reuse as much as possible of the milkymist tech we have now, and let us grow that further | 12:26 |
wolfspraul | #3 get the highest performance and most easily available chip for the least cost (per performance) | 12:26 |
wolfspraul | the choice of the slx45 (speed grade 2 I think) for m1 was pretty good, even in hindsight | 12:28 |
wolfspraul | one could debate about slx45 vs slx75, but nobody uses those cells right now anyway, so slx45 is/was good | 12:28 |
larsc | i have a few zynq boards on my desk and they are nice, because you have the flexibility of a fpga with the processing power of a dual core arm. | 12:37 |
larsc | but i don't think they are the right fit fore the milkymist project | 12:38 |
wolfspraul | which chips do you have on those boards? | 12:38 |
larsc | s/fore/for | 12:38 |
larsc | not sure | 12:38 |
wolfspraul | why not right fit? | 12:38 |
wolfspraul | it's early now, we also have to see about availability and prices | 12:39 |
wolfspraul | fpga makers are known for extensive list of part numbers with few chips actually generally available :-) | 12:39 |
larsc | because they come with a bunch of hardcores | 12:39 |
wolfspraul | yeah | 12:41 |
wolfspraul | maybe we could run the VJ app on Intel's "Next Unit of Computing" boards right away :-) | 12:42 |
larsc | exactly | 12:42 |
wolfspraul | so we think that the extra cores and IP distract from the beauty and simplicity of what Milkymist is about | 12:43 |
wolfspraul | that's just a tough thing to sell potentially, if someone says "why not use that chip and have a much easier life" | 12:43 |
wolfspraul | but I agree my feeling is it would be a huge distraction | 12:44 |
wolfspraul | larsc: thanks for your thoughts on this! since you already play with those chips :-) | 12:45 |
larsc | if you happen to be at Xfest by chance there is a demo I build at the ADI booth, showing a zynq running ubuntu with 1080p video out | 12:49 |
wolfspraul | nice | 13:13 |
wolfspraul | but not very likely, don't even know what Xfest is? | 13:13 |
wolfspraul | this one? xfestmodesto.com ? | 13:14 |
sb0 | a trade show organized by xilinx | 13:14 |
wolfspraul | hah, and I found this xfest music festival :-) | 13:15 |
Hodapp | hm, odd, there is an Xfest every year through my hometorn | 13:19 |
Hodapp | s/hometorn/hometown/ | 13:19 |
Hodapp | people don't go for the music, they go because of the weed and the bare breasts from girls who want to earn beads | 13:19 |
wolfspraul | ah yes, now we know where lars is going | 13:20 |
Hodapp | Have you guys seen the tiny laser projectors? I just met the guy who developed the driver boards on the Microvision ones, and I guess they're $150 - $300 or so depending on where you find them and what version; new one is 50% brighter but in human vision terms that's really not much | 13:21 |
wolfspraul | I have one right here | 13:22 |
Hodapp | Was thinking of this with the video someone posted of a Milkymist set up with a projector in a very impromptu way | 13:22 |
Hodapp | as the Microvision can run from battery or from USB power | 13:22 |
wolfspraul | for a while I thought this might be good with m1, but nowadays I believe in large & cheap monitor screens instead | 13:22 |
wolfspraul | the laser is cool though, but the big issue is brightness | 13:22 |
Hodapp | yeah... | 13:22 |
Hodapp | I am going to pick up a couple and play around | 13:23 |
wolfspraul | it would be great to open more of this design, galvo control etc. | 13:23 |
wolfspraul | pick up a couple? | 13:23 |
wolfspraul | maybe you can pickup a couple m1 too? | 13:23 |
Hodapp | lol | 13:23 |
Hodapp | I'm thinking about it. If I am able to meet up with a couple local friends and practice some VJing stuff, I may get one. | 13:23 |
wolfspraul | I *thought* (guessed) about the company behind a little - microvision | 13:23 |
wolfspraul | please do | 13:23 |
wolfspraul | and my feeling is that this product is more or less a proof-of-concept for them | 13:24 |
wolfspraul | they are not serious about entering consumer electronics in a big way, they just do this product to ease their investors pain over many years of investing | 13:24 |
wolfspraul | that's my feeling | 13:24 |
wolfspraul | their real market (and maybe exit) strategy seem to be some vertical markets | 13:24 |
Hodapp | the man who made the board purposely made it hackable and broke out all of the relevant pins right underneath the battery and told them it was for testing purposes (which it sort of was) | 13:24 |
wolfspraul | is this documented somewhere? | 13:24 |
Hodapp | I'll talk to him about it | 13:25 |
wolfspraul | I am mostly interested in the electric design and firmware that controls the galvos and lasers | 13:25 |
Hodapp | I'm interested in knowing how fast you can modulate the laser because I'm told that the resolution is largely a software limitation | 13:25 |
wolfspraul | or rather not me, but marcan our openlase friend | 13:25 |
Hodapp | openlase? | 13:25 |
wolfspraul | yeah | 13:25 |
Hodapp | I will talk to Bill about this | 13:25 |
Hodapp | all I know now is that it's FPGA based and it's his design | 13:26 |
Hodapp | he is on IRC - as wjsteele - but rarely | 13:27 |
Hodapp | I have had the Milkymist thesis paper sitting on my desk waiting to be read but have just been so busy :| that and Kinko's screwed up and printed it on card stock and so it's an inch thick | 13:27 |
wolfspraul | I think the laser stuff needs a lot more investment | 13:28 |
wolfspraul | or, of course, some really big 'open' push by someone that drives it forward that way, but I don't see that happening right now | 13:28 |
Hodapp | perhaps, if I go to grad school, I'll focus on something like this... | 13:50 |
wolfspraul | get an m1 first that gets you in the right direction | 13:51 |
Hodapp | bah. I need to get some sleep first | 13:51 |
wolfspraul | can't beat that. same here... n8 | 13:51 |
wolfspraul | thanks for bringing up the laser! | 13:51 |
Hodapp | I have interest in computer graphics and in programming, but my undergrad was in EE | 13:51 |
wolfspraul | I like that little thingie... | 13:51 |
Hodapp | however, I'm kind of EE-clueless and I don't presently work much in EE except for when my job involves image & signal processing | 13:52 |
Hodapp | or someone needs a person who can solder or read a schematic | 13:52 |
Hodapp | wolfspraul: this OpenLase project is very interesting | 14:08 |
wpwrak | (chips combining CPU, memory, and FPGA) sounds very attractive for an FPGA-Ya. | 14:43 |
Hodapp | wpwrak: what's this about? | 14:43 |
wpwrak | BUT ... if this can't be treated as a reasonably generic bundle, then it probably isn't worth it. (i.e., if it's all proprietary cores and things, blocking the way to, say, llhdl) | 14:43 |
wpwrak | Hodapp: the idea of making another nanonote, but this time FPGA-based | 14:44 |
Hodapp | oooh | 14:44 |
wpwrak | hard not to like that idea, eh ? in all its crazy glory ;-) | 14:45 |
Hodapp | why does https://en.wikipedia.org/wiki/Ben_NanoNote mention the Milkymist? | 14:45 |
wpwrak | dunno. perhaps marketing was at work ? :) mentioning qi-hw there may be better. | 14:47 |
kristian1aul | FPGA-Ya indeed | 15:39 |
kristian1aul | perhaps 85k cells is not enought for a soc, but for somethine else | 15:39 |
kristian1aul | so not us and the soc.. | 15:52 |
wpwrak | exactly. if you already have an ARM core, you only need to synthesize the peripherals | 15:56 |
wpwrak | but i suspect that simply lack of openness would spoil that fun | 15:56 |
kristianpaul | oh yeah, propietary bus interface.. etc | 15:57 |
kristianpaul | an aprouch like the one from SIE could work for a YA, but.. to be honest a dual fpga or dual core aprouch now that there is a mmu in progress | 15:58 |
Fallenou | in progress is the word :p | 15:59 |
Fallenou | really work in progress | 15:59 |
kristianpaul | but it works, no? | 16:00 |
Fallenou | translation of virtual addresses to physical ones through TLB is working yes (at least 15 test cases are passing) | 16:00 |
kristianpaul | just missing Linux support i want to meant with "in progress" btw :-) | 16:00 |
Fallenou | oh no | 16:00 |
Fallenou | it misses other things | 16:00 |
kristianpaul | too many? | 16:00 |
Fallenou | exception handling is work in progress (in a good shape though) | 16:01 |
Fallenou | and ITLB is still completely missing | 16:01 |
Fallenou | and it will be a tough task :) | 16:01 |
kristianpaul | i see | 16:01 |
kristianpaul | larsc: your demo include some fancy gateware implemented on the 85k cells? | 16:07 |
sb0 | wpwrak, also those ARM cores typically come with lousy bus interfaces | 16:13 |
sb0 | things like wishbone probably look too simple and therefore lack a feeling of job security | 16:14 |
sb0 | you need things with "advanced" in the name and tons of bloated complications | 16:15 |
kristianpaul | agreed :) | 16:15 |
kristianpaul | well, still a Linux friendly with fgpa and recofigurable cores but thats other part of the history | 16:16 |
kristianpaul | perhaps xilinx already look at it? | 16:17 |
wpwrak | sb0: if you starve marketing, they will starve engineering in retaliation :) | 16:17 |
wpwrak | sb0: but i'd be mainly interested in the core speedup, which should be enormous | 16:18 |
sb0 | let's make a LM32 ASIC then | 16:18 |
kristianpaul | is alredy no? | 16:18 |
kristianpaul | lets ask lattice for samples ;-) | 16:18 |
kristianpaul | or you mean whole ASIC SoC by instance? | 16:18 |
wpwrak | (asic) hmm, i see lots of chips and lots of pins :-( | 16:18 |
kristianpaul | hehe | 16:19 |
wpwrak | kristianpaul: that would mean losing the configurability | 16:19 |
kristianpaul | thats why i point double fpga solution | 16:19 |
sb0 | 32 bit address, 32 bit data, 4-5 control signals | 16:19 |
sb0 | you can also multiplex address/data | 16:19 |
sb0 | not too inefficient when using burst | 16:20 |
sb0 | that's around 40 pins... | 16:20 |
wpwrak | 40 sounds manageable ... | 16:20 |
sb0 | also if you have just the LM32 and that bus i/f, the thing should be rather risk-free and painless. | 16:21 |
sb0 | but it can only be used with a FPGA/CPLD | 16:21 |
wpwrak | the advantage over using something non-LM32 would be that you could optimize the bus for low pincount, because you know you have the FPGA on the other side to take care of the rest | 16:22 |
sb0 | I wonder what silicon area we'd be talking about exactly | 16:22 |
wpwrak | (only FPGA) yes, exactly | 16:22 |
wpwrak | an interesting approach. the core is something we wouldn't want to change too frequently anyway | 16:23 |
sb0 | I was thinking about including some optional peripherals (simple sdram controller, lcm, ...) so the asic can be used standalone in e.g. the ya, but it increases difficulty and risk of a totally nonworking chip | 16:24 |
kristianpaul | drasko mentioned about an LM32 asic time ago http://lists.milkymist.org/htdig.cgi/devel-milkymist.org/2010-September/000860.html | 16:28 |
kristianpaul | oh, do we have an lcm core already? :-) | 16:42 |
roh | kristianpaul: any idea how fast a lm32 with mmu can be clocked? | 20:55 |
roh | my question goes into the direction of 'how fast can we hope to get a linux kernel on that platform' | 20:55 |
kristianpaul | nope sorry | 20:59 |
kristianpaul | i'm total ignorant about mmu | 21:00 |
kristianpaul | for my self a computer memory should be a flat space, just like the internet should be ;) | 21:00 |
kristianpaul | i guess so far clocks as usual | 21:00 |
kristianpaul | lets wait Yann elaborate more about this topic later :) | 21:01 |
kristianpaul | he, a jornada 720 ram run by 50mhz and cpu is 200mhz | 21:01 |
kristianpaul | display is 640x320 | 21:01 |
kristianpaul | interesting | 21:01 |
kristianpaul | perhaps an altera fpga could clock milkymist at that speed.. | 21:02 |
roh | ok.. then lets forget that stuff and go to proper integrated cores | 21:03 |
roh | that low resolutions and clocks makes it unsellable in my eyes | 21:03 |
kristianpaul | all varies roh , it depends what porpuse you found for it | 21:05 |
kristianpaul | as everything else | 21:05 |
roh | kristianpaul: i was mostly thinking about the nn ya discussion | 22:31 |
wolfspra1l | ok, the rough consensus seems to be to skip the Zynq chips for now | 23:32 |
wolfspra1l | when they are available with pricing etc (q1/2013) we can take another look | 23:32 |
wolfspra1l | I somehow feel it would be a big distraction, but it's important that the Milkymist community is more or less united about this issue - we are small enough | 23:33 |
wolfspra1l | btw, there have been similar attempts by other fpga makers in the past, and eventually they all fizzled | 23:34 |
wolfspra1l | now the next round | 23:34 |
wolfspra1l | I think it's also very risky from Xilinx, marketing-wise. their customers may like the arm cores so much that in the next product iteration, they kick that convoluted fpga fabric out :-) | 23:35 |
wolfspra1l | but I'm sure they have this carefully thought through and aligned with their major customers | 23:35 |
wpwrak | they have the ARM choice already today. seems low-risk for xilinx. | 23:46 |
wpwrak | for most customers, the difference would probably be that they don't need to many chips | 23:47 |
wpwrak | i like sebastien's idea of having just the core in an asic | 23:47 |
wolfspraul | where do they have the arm choice today? | 23:52 |
wolfspraul | you mean the customers? | 23:52 |
wpwrak | yes | 23:54 |
wolfspraul | that's my point. I don't know the exact relationship between Xilinx and its customers, but I think it's fairly tight. | 23:54 |
wpwrak | you once mentioned yourself that everyone you talked to said to use a regular SoC for the core and the FPGA for "special tasks" | 23:54 |
wolfspraul | I do think the fpga fabric is in the middle of this relationship. A Mercedes s-class supposedly has over 10 xilinx fpgas inside, for example. | 23:55 |
wpwrak | wow :) | 23:55 |
wolfspraul | and I think their customers look from the perspective of the ISE design suite | 23:55 |
wolfspraul | now, with Zynq, Xilinx takes a big risk. not saying it's bad, businesses have to take risks. | 23:55 |
wolfspraul | but those chips boot and act like ARM chips first of all | 23:55 |
wolfspraul | and Xilinx comes out with an entirely new design suite | 23:55 |
wolfspraul | I think they want to reposition the entire company and how this company (xilinx) is perceived by its customers | 23:56 |
wpwrak | ah, you mean the R&D investment on xilinx's side | 23:56 |
wolfspraul | not an fpga company, but a "chip" company | 23:56 |
wpwrak | well, let's see how that goes :) | 23:56 |
wolfspraul | including arm cores (of course, best toolchain, best portability, best this that), programmable fabric, more linear functionality/mixed signal, etc. | 23:56 |
wolfspraul | yes sure, as I said I am *guessing* only from reading the web | 23:57 |
wpwrak | kinda like cypress with psoc 3-5. i wonder what happened to them ... checking ... | 23:57 |
wolfspraul | of course customers decide | 23:57 |
wpwrak | wow. seems that they are available now (cypress) | 23:58 |
wolfspraul | as for "make lm32 asic", sure that's a nice plan but just theory. I rather go by where we are today practically. | 23:59 |
wolfspraul | "making chips", what is that? and why? how do we compete? of course it's "cool", so? | 23:59 |
wolfspraul | I see the entire logic board just as 2nd level IC packaging nowadays :-) | 23:59 |
--- Fri May 4 2012 | 00:00 |
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