| GitHub161 | [flickernoise] xiangfu pushed 2 new commits to master: http://git.io/qih3Tg | 04:30 |
|---|---|---|
| GitHub161 | [flickernoise/master] remove useless translation: Control panel * - Xiangfu | 04:30 |
| GitHub161 | [flickernoise/master] gui/cp.c: break down that cp_notify_changed() - Xiangfu | 04:30 |
| mwalle | lekernel: io_do <= io_a, issuing in 0x00 .. in 0x20 returns | 13:01 |
| mwalle | 00 01 02 03 04 05 06 07 08 09 10 39 17 13 14 15 16 17 18 19 20 | 13:02 |
| mwalle | actually i missed the 0xa..0xf .. lol | 13:02 |
| mwalle | really strange | 13:03 |
| mwalle | in simulation i didn't find anything unexpected | 13:06 |
| GitHub81 | [migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/b9c533be51a7f4a95670ce2a9a89573736e2b7ff | 13:07 |
| GitHub81 | [migen/master] bank/csrgen: allow specifying existing CSR interface - Sebastien Bourdeauducq | 13:07 |
| lekernel | mwalle: if there are simulation vs. synthesis mismatches, it could be a case of the blocking assignment causing non-determinism in communications between always blocks | 13:35 |
| lekernel | the navre source code is full of this gotcha | 13:35 |
| lekernel | we should clean this up by "buffering" through a non-blocking assignment all signals that are read in another always block | 13:36 |
| lekernel | and, great catch btw. it may help explain some USB bugs... | 13:36 |
| mwalle | lekernel: do you know how i can open fst files in gtkwave? | 13:41 |
| lekernel | fst? what's that? | 13:41 |
| mwalle | mh, sth like vcd, which can cver export | 13:42 |
| lekernel | cver should support vcd too | 13:42 |
| mwalle | oh | 13:42 |
| lekernel | at least the gpl version does | 13:42 |
| mwalle | lekernel: 0x1739 <<-- might this be the stack pointer? | 13:52 |
| mwalle | or hte cpu flags? | 13:52 |
| mwalle | btw i did a serial crc5/crc16 checker for the rx path, i'll post the patches on the ml soon. then you can have a look at it and tell me whats all wrong ;) | 13:55 |
| mwk | hey guys | 13:57 |
| mwk | I'm interested in using/developing open source FPGA synthesis tools | 13:57 |
| mwk | I've seen the llhdl/antares efforts, is there anything else? | 13:58 |
| mwalle | mwk: there is migen | 14:27 |
| mwalle | 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 19 17 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 | 14:27 |
| mwalle | sth must be special about 0x11 and 0x12 | 14:27 |
| mwalle | ahhh that the counter, doh! | 14:31 |
| lekernel | migen isn't actually doing any fpga synthesis. it's a verilog generator. | 16:25 |
| kristianpaul | http://www.johndcook.com/blog/2009/10/08/nasa-buggy-software/ | 22:00 |
| mwalle | lekernel: btw do you have a spare usb tranceiver used on the mm? | 22:10 |
| lekernel | mwalle: I think so... what do you want to use that for? | 22:18 |
| mwalle | lekernel: add a device port using the expansion pinheader | 22:18 |
| lekernel | mwalle: I have. can send them tomorrow if the post is open in this period of karfreitag, tanzverbot, etc. | 22:26 |
| lekernel | anything else you need? | 22:26 |
| mwalle | lekernel: no hurry, atm i'm using a selfmade cable, usb-a usb-a ;) | 22:26 |
| mwalle | with a pullup to 3v3 | 22:27 |
| mwalle | lekernel: i dont think so, i guess these varistors arent really needed, resistors.. i have plenty on work | 22:30 |
| mwalle | lekernel: there are no special io requirements for the usb pins, right? | 22:31 |
| lekernel | on the fpga? no | 22:32 |
| wpwrak | lekernel: "tanzverbot" sounds like an underground event. are the raves back ? :) | 22:32 |
| lekernel | if only :) http://de.wikipedia.org/wiki/Tanzverbot | 23:17 |
| --- Sat Apr 7 2012 | 00:00 | |
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