#milkymist IRC log for Wednesday, 2012-04-04

kristianpaulwpwrak: from the current understanding of softusb core, do you think it is more intented for ie, 'migrate' linux drivers for some usb devices than actually implementing the whole usb stack?04:03
kristianpauli ask this in the ignorance of the usb internals on Linux as well, so i relly on your comments04:03
kristianpaulrelay*04:04
wolfspraulrely04:04
kristianpaulhe04:05
kristianpaulThanks !04:05
wpwrakkristianpaul: at the moment, it's all about implementing the stack on the navre. the FPGA core could be used for a more general architecture, though04:54
wpwrak(the FPGA core is very simple and thus quite generic. it's the navre who connects the dots)04:55
qi-botThe firmware build was successful, see images here: http://fidelio.qi-hardware.com/~xiangfu/build-milkymist/milkymist-firmware-20120404-1312/12:53
qi-botThe firmware (using branch) build was successful, checkout the VERSIONS for detail, see images here: http://fidelio.qi-hardware.com/~xiangfu/build-milkymist/milkymist-firmware-20120404-1453/14:33
mwallelekernel: youre there?20:50
lekernelmwalle: yes21:34
mwallelekernel: the navre io bus is 6 bit wide isnt it?21:52
mwallefor some reason rio8(0x11) doesn't work, mhh21:54
lekernelwell, it should. what happens?22:12
mwallelekernel: reads some garbage. i extended the switch statement in softusb_sie.v, with another (lower) address, it works22:15
mwallelekernel: never mind, i'll try to simulate it tomorrow22:15
lekernelaha. maybe you've found a bug.22:20
jpbonncan anyone tell me why I get different values when reading 0x60001074 and 0xe0001074?  Doesn't 0x60001074 shadow 0xe0001074?  This is using gdb on qemu.22:35
lekernel0xe... is non cacheable (wrt L1) while 0x6... is - but afaik it shouldn't make a difference when using qemu22:46
lekernelthough I'm not sure if qemu implement CSRs correctly at 0x6..., since they should always use non cacheable access :)22:46
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