#milkymist IRC log for Saturday, 2012-02-18

wpwrakhmm, i wonder if we should have a perl-like  <assignment> if <condition>;  construct14:17
wpwraki notice that - particularly with midi controls -  i'm doing a lot of   foo = cond ? complicated_expression : foo;14:18
wpwrakthat would then become  foo = complicated_expression if cond;14:18
kristianpauleasy to read :)14:18
GitHub152[milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/UkVStA17:18
GitHub152[milkymist-ng/master] Send SDRAM initialization sequence and answer PHY read/write requests. Obstinately refuses to work, unfortunately. - Sebastien Bourdeauducq17:18
kristianpaulwpwrak: AWESOME !!17:18
kristianpaulanimations :)17:18
kristianpaulgetting ready for the next party? ;-D17:18
wpwrakheh :)17:18
wpwrakyeah, i think with good image support, we can do quite a lot17:19
wpwraki.e., fake lots of effects m1 isn't capable of ;-)17:19
Action: kristianpaul needs a midi controller too17:19
kristianpaulfake, lol :)17:19
kristianpaulfinally mid and bass make more sense for me :)17:19
Action: kristianpaul thinks in a fake matrix lets said 20x 20 pixels17:23
kristianpaulbut how i could draw ont it..17:23
kristianpaulnah too complicated..17:23
wpwrakyou may want to look at how i've done the rotating disc. it's a multi-layered xfig file. then i labeled the elements according to the frame in which i want them, then filter the xfig and convert the filtered result17:26
wpwrakfor sequences with more frames you'd probably want some kind of keyframe animation. but for simple things this works quite nicely17:29
lekernelyeah, well done wpwrak! thanks!17:32
wpwrakshall i merge it into master ?17:33
lekernelshall we push out a web-update?17:33
lekernelyes, sure17:33
Action: lekernel loves to fight DRAM problems. I wish I had a magical internal logic analyzer in the FPGA which samples at 400MHz, takes only a few seconds to attach to a signal, has a reasonably deep memory...17:35
lekernelactually that would be a nice application of bitstream format reverse engineering17:35
wpwraki have one code generation / scheduler regression to track down: in a different version of the animation patch, some of the variables aren't updated properly. need to see what's causing that. back when i wrote the scheduler, i didn't fully understand the lifecycle of variables, so maybe i got something wrong there.17:37
wpwrakluckily, it's pretty difficult to hit that one :)17:37
GitHub7[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/d8d4e81b6e0624cb7055dbb147a967f5975f294b18:02
GitHub7[migen/master] bank/csrgen: fix RE generation - Sebastien Bourdeauducq18:02
wpwraklekernel: you think the fpga could sample at 400 MHz ?19:01
lekernelit's sampling the DRAM pins at 333MHz atm (or at least it's supposed to)19:04
lekerneland of course, no fast scope/LA around ...19:07
lekernelI was hoping the NWL PHY would work, but it does not. in fact, it seems rather crippled with bugs.19:07
wpwrakhm. 300 Mhz would be quite respectable already19:07
wpwrakparticularly if you can DMA to DRAM19:08
lekerneland there's absolutely no documentation about how it calibrates the data paths, which is what is failing atm19:11
lekernelRTFS ...19:11
kristianpaulwhat S stand for? Sources? ;)19:20
wpwraksilicon ?19:21
lekernelyes, sources19:22
lekernelthey have some system that writes LFSR-generated data to the DRAM and attempt to read it back19:23
kristianpaulsparv_8 soc  https://github.com/teeshina/soc_leon319:24
lekernelbut in case of problems, I have quite no idea how it determines whether the problem is on read or write19:24
kristianpaulcalibrate data paths sounds something, you are usually forbid to ask ;)19:28
whitequarkok, finally got time to look at my new m119:39
whitequarkit looks awesome! too bad I don't have a VGA anything at the moment19:39
whitequarkI was especially impressed by overall build quality, and the huge collection of socket plugs. I thought there were less of them in the world19:40
hypermodernGreetings do any of you have some links to videos of you using the Milkymist?  I'd like to have your permission to use them in a presentation about the hardware.19:53
GitHub48[milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/5r1XPw20:12
GitHub48[milkymist-ng/master] bios: fix function prototypes - Sebastien Bourdeauducq20:12
lekernelhi hypermodern23:11
lekernelsure, http://vimeo.com/3084245123:14
lekernelthe latest one from werner http://www.youtube.com/watch?v=NrCbg6HNb5A23:14
lekernelalso http://milkymist.org/wp/2011/12/cheap-dinosaurs-and-no-carrier-at-8static/23:14
lekerneland http://www.twitvid.com/G7BVI23:15
lekernelaccording to our DRAM specs we have a data output valid window of 2.1 ns worst case, and the data timing relative to the clock is +/- 0.7 ns23:26
lekernelI wonder if this little calibration mess is really necessary anyway23:27
lekernelor if we can just treat it as a normal synchronous circuit23:27
lekernelhmm... it's tight, but it seems we can23:49
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