#milkymist IRC log for Monday, 2012-02-13

FallenouI don't think we will need more actions in the short term00:00
Fallenoubtw bit 0 is to select DTLB or ITLB but maybe you already figgured that out00:00
Fallenoubit 0 is '1' here for DTLB00:00
Fallenouthat's why I check for csr_write_data[0] everywhere00:00
FallenouOK still works I commit it00:04
Action: dvdk still doesn't understand half of the dcache.v code 00:05
Fallenoumaybe I can help00:06
Fallenouor maybe I let you read and I go to sleep :)00:07
FallenouI should be going or the week will be hard!00:07
dvdkthis is going to take a few days (nights) to grok.00:09
Fallenouhehe it took me a while to understand00:10
Fallenouand to start modifying in a way that seems to make sense in simulations00:10
dvdkthanks for your help so far.  with the simulation verified to work, i can check everything quite comfortablly00:10
Fallenouyou're welcome, thanks for the gnu as trick00:10
Fallenoufor now, going to sleep !00:11
dvdkgood night.00:11
FallenouI just remembered I have a day job tomorrow00:11
Fallenougn8 !00:11
dvdkyeah me too, but slept too much today already :)00:11
Action: Fallenou drank too much00:11
Fallenousee ya !00:11
kristianpaulfpgaminer: that uut2 is for debuging porpuses right?02:50
kristianpaulargh or we need to confirm hash generation using a second hasher..02:56
fpgaminerkristianpaul: Bitcoin uses a double hash.07:17
fpgaminerkristianpaul: Bitcoin hash = sha256(sha256(data))07:17
Action: fpgaminer is wondering if he should dare to get DDR2 memory working on his devkit for the Milkymist port ...07:25
lekernel_meh? https://github.com/fallen/milkymist-mmu/commit/4da6d2b4141751f40b2cd92ef3efd94cdb6a2703#diff-108:21
lekernel_just modify binutils instead ...08:21
lekernel_unless you're only doing a quick test08:22
Fallenoulekernel_: it's already done08:34
Fallenoubut it's cool if david or someone else does not want to recompile binutils :)08:35
lekernelcode duplication is rarely cool08:36
lekernelat least not in the long term08:36
Fallenousure, for the long term modified binutils is the way to go08:36
Fallenouif it can lower entry barrier for some developer who wants to help, just allowing not to compile a big tool like binutils, it can be a good idea08:37
Fallenouanyway I don't plan on using this kind of gnu as macro trick for "production" things, the dtlbtest() in the modified bios uses asm() inside C program and still needs modified gnu as08:38
FallenouI suspect the freeze I had yesterday while testing dtlbtest occured because I was trying to write at physical page 008:43
wpwrakaah !08:43
FallenouI think there is some kind of protection against this in the SoC code08:43
wpwrakyo umet the NULL pointer trap :)08:43
Fallenouit's a tarp08:43
FallenouI will redo the test today, mapping virtual page 1 to physical page 208:43
Fallenouand pray harder08:44
lekernelFallenou: I think you should instead disable this check (in system.v)08:44
wpwrakmmh, better go to RAM.08:44
Fallenou(instead of mapping virtual page 1 to physical page 0)08:44
larscremoving the trap shouldn't be to hard08:44
Fallenouwpwrak: oh I mean in RAM, || 0x440008:44
wpwrakas far as i recall, the NULL pointer area is pretty large. ~128 kB, no ?08:44
Fallenouarg so several pages08:45
Fallenouok will check08:45
wpwrakRAM is above the NULL pointer trap area08:45
Fallenouah yes so it was not the trap :/08:45
FallenouI was trying to access 0x4400000008:46
wpwrakif you really want to write to NOR, i can also walk you through that process. but it's a bit messy.08:46
Fallenouno no let's keep it siple :)08:47
wpwrak(because of locking and because word writes can only change 1 -> 0, so you need to erase the block to get back to 1)08:48
wpwrakyeah, RAM is simple and symmetric :)08:48
Fallenouthe simpler, the better08:49
Fallenouto reduce murphy effect as much as possible :p08:49
wpwrakyeah, the hard part is the proof of concept. once you have the whole story work at least once, all the rest is incremental08:51
xiangfukristianpaul, Hi08:52
lekernellet's say the FPGA design makes it look simple and symmetric from the CPU point of view. but it'd have been actually simpler to use NOR at the underlying medium than DDR *g*08:58
wpwrakyou could have added an SRAM chip to work around that issue ;-)08:59
lekernelxiangfu: by the way, the VGA core doesn't output sync-on-green information. you may want to try to add it (just XOR of HSYNC and VSYNC on the appropriate pin of the ADV7125)09:00
lekernelwpwrak: actually I thought early about using SRAM for system memory, but it would cost more than $100 for 4MB09:01
wpwrakyeah, SRAM is evil09:01
wpwrak(sync on green) is that ever needed for VGA ?09:02
lekerneleven though the chip area is only about 6 times larger than DRAM for a given capacity, the cost per bit is much higher09:02
wpwrakmay be the smaller volume09:02
lekernelyes, sure09:02
Fallenou6 transistors per bit, instead of 1 capa ?09:02
lekernelinstead of 1 capa + 1 transistor09:02
Fallenou(+ 1 transistor)09:02
lekernel(sog) in theory no, but who knows how they designed that projector09:03
rohlekernel: could you capture vga if provided on rca with sync on green?09:03
lekerneland all computers I know of have sog09:03
lekernelroh: with the 7181C yes09:03
lekernelup to 1024x76809:04
rohnice. that could actually be really useful.09:04
lekernelassuming, of course, that we have a proper FPGA and software design09:04
rohkinda vga-genlocking with effects09:04
azonenberglekernel: yeah, SDRAM is nasty stuff09:05
azonenbergwhether DDR or not09:05
lekernelat least SDR uses only a complex control algorithm09:05
lekernelthat is, if you want performance - with autoprecharge and a simple FSM, it's not too bad09:05
azonenbergBtw, roughly how big is the ethernet MAC you guys are using? In terms of slices09:06
lekernelDDR uses both a messy algorithm and super-messy I/Os09:06
lekerneland it's getting worse with each generation - the only thing that went better was the removal of some off-chip terminations09:06
Action: azonenberg wonders why we cant just talk to ram over LVDS09:07
azonenberghave like 16 source-synchronous DDR LVDS pairs clocked at a GHz or so09:07
lekernelDDR4 will be using some new "POD12" signaling... the JEDEC spec is already published, haven't looked at it yet09:07
azonenbergis it compatible with existing, say, FPGAs?09:07
lekernelI guess not :)09:08
azonenbergnot that the hard MCBs etc will work09:08
azonenbergAnd not that it matters to me since i dont yet have board fab capabilities to do BGAs that fine09:08
lekernelthough maybe you can hack it if you write the IOB frames yourself instead of using the preset (LVCMOS33, ...) ISE settings09:08
azonenbergthe newest RAM i can handle on my process is DDR in TSSOP since the BGA versions of DDR2/3 are too small09:08
azonenbergpitch wise09:08
lekernelbut that would need some very low level reverse engineering09:08
azonenbergAnd i have to use FTG256 or FGG484 FPGAs09:09
azonenbergCSG324 is too fine pitch for the fab's design rules09:09
azonenberghttp://i.imgur.com/X2I03.jpg is my first FTG256 board09:10
azonenberglekernel: i am very interested in REing the spartan6 bitstream formwat09:10
azonenbergbut i want to start small09:10
azonenbergwith say XC9500 CPLDs09:10
azonenbergbtw, speaking of which, XC9536XL-5VQG44 http://siliconpr0n.org/map/xilinx/xc9536xl_vqg44awn1105__neo50xulwd__semipol_lev_noz_dirty/09:11
azonenbergtop metal, roughly gigapixel resolution09:11
lekernelthe IOB frame isn't the hardest... on S6 it's just one big shift register, with a fixed number of bits (and the same format) for each I/O site09:11
lekernelwell, CPLDs and FPGAs have wildly differing architectures, I'm not sure if you'll learn anything useful for FPGAs by starting with CPLDs09:12
azonenbergno, i want to learn abourt xilinx's bitstreams in general09:12
azonenbergthe next will be spartan3a09:12
azonenbergi have some i dont mind killing so i may decap and image them to study the die layout and see how accurately it matches the planahead / fpga editor views09:12
lekernelthe bitstream format is semi-trivial, what matters is the internal structure of the interconnect09:12
lekernelyou can get a complete map of it using xdl09:13
azonenbergI may look at an original 4000 series first09:13
azonenbergthose are 350nm and big enough to do transistor-level RE of with the equipment me and my collaborators have09:13
lekernelnow it'd be interesting to do some graph analysis on it, classify tiles, find regularities, etc.09:13
azonenbergXilinx devices are high on our hit list09:14
azonenbergbut we're working our way up09:14
azonenbergthe CPLD came first since i had one around i didnt mind killing and it was only $1.6009:14
azonenbergplus it was a 350nm process whcih is big enouhg to fully image optically09:14
lekernelI have a box of 64x XC4036 which you can kill if you want09:14
azonenbergi dont need that many lol09:15
azonenbergLet me ask my friend if he has any yet09:15
azonenberghe may have some xc4000 series already09:15
azonenbergjust not decapped yet09:15
azonenbergwe have so many specimens its not even funny, the bottleneck is lab time09:15
lekernelactually the xc4000 arch is documented in xilinx patents09:15
azonenberghe only has so many hours a day to work on it09:15
azonenbergDo you know if there are any patent concerns re writing FOSS toolchains btw?09:16
azonenbergiow, if we do not implement an FPGA using their architecture09:16
azonenbergbut only target theirs with our software09:16
azonenberga) do they have any legal basis to complain09:16
azonenbergb) do you think they would care, or welcome it09:16
lekernelcheck US590724809:16
azonenbergToo sleepy to do technical reading but will check when i'm awake09:17
lekernelI think they won't care, especially if it's for the obsolete xc400009:17
azonenbergi meant for s3a/s609:18
wpwrakmy guess is that they will fight you09:18
azonenberg4000 is EOL'd so much they dont even support it in currnet ISE09:18
azonenbergthey wont care about that09:18
azonenbergI just wonder if it'd prove impossible to get a toolchain for current generation architecture09:18
wpwrakbut there may be little they can do once the cat's out of the bag :)09:18
azonenbergwhy must FPGAs be so secretive? Intel documents their instruction set09:19
wpwrakbesides some legal revenge killing, of course09:19
azonenbergand welcomes third party compilers09:19
lekernelno, it's not impossible09:19
azonenbergso why cant fpga vendors do the same09:19
lekernelit's just that no one cares09:19
wpwrakbecause being open takes courage09:19
lekernelall hackers want is raspberry pi's and arduinos09:19
wpwraklekernel: there's more to it. by giving out information, you may give a competitor a small advantage. or at least you can imagine you may.09:20
wpwraklekernel: also, any information you provide can and will be used against you by patent trolls09:20
lekernelbut it's not as if the bitstream format was *so* hard to understand09:21
lekerneland as I said, you can find plenty of resources about the architecture (xdl, patents, ...)09:21
wpwrakand then there's design protection. customers may not appreciate seeing their preciousss IP exposed to prying eyes09:21
lekernelyes, that too... and also they said they want to keep the toolchain under control to limit tech support problems09:22
wpwrakcorporate psychosis at its best ;-)09:23
wpwraki'm sure intel tech support has no end of trouble because of all those pesky gcc users ;-)09:24
lekernelwell... seems they're happy this way, with big telcos and government agencies as their main customers09:24
wpwrakbut what would happen is that, once the cat's out of the bag, the FPGA world will change forever. and then they would have to consider adapting. and that is an effort. beancounters don't like extra efforts.09:25
lekernelI'm not sure if it'll make such a large difference in the "FPGA world"09:26
lekernelimagine we publish a free toolchain tomorrow, what will happen?09:26
lekernelacademics will probably use it - rather small impact09:26
wpwrakif it's good, it may see widespread use09:26
lekernel4 hackers will jump into FPGAs - negligible impact09:26
wpwrakalso, people will then include support by that toolchain in their purchase decisions09:27
lekerneland I guess their main (conservative) customers will keep using ISE09:27
wpwraki think there's more untapped potential in fpga than just 4 hackers09:27
wpwrakoh sure. they'll stick with the proprietary stuff until they reach retirement age.09:27
wpwrakbut the kids fresh from university who replace the geezers will have different ideas09:28
wpwrakand there are a number of rather interesting research opportunities waiting there as well09:29
wpwraklike accelerating that excessively sluggish synthesis process. i'm sure a quick and dirty synthesis could be done in a negligible fraction of the time the current tools use09:30
wpwrakmaybe 50% and twice the size of the "optimized" design. who cares if it's inefficient during development ?09:31
wpwrak50% the speed09:31
lekerneloh, totally. and direct lava-to-bitstream sounds quite interesting too :)09:31
wpwrakand then there's partial reconfiguration09:33
wpwrakand then, the next big leap, C to FPGA. for inner loops. and yes, you probably want to use llvm for that project ;-)09:34
wpwrakso yes, i think there's an exciting world waiting on the other side of that wall of secrecy09:35
lekernelit's not a wall of secrecy, but rather a wall of indifference09:35
lekerneljust like the one the M1 has hit09:35
wpwraki think there's more to it. i don't expect them to be happy when you mess with their ecosystem.09:36
wpwrakM1 still needs to mature a bit. it's not ready for the masses anyway09:37
wpwrakright now, it's at the level where hackers can use it. now intersect the hacker population and the VJ population. pick from this set these who have a disposable USD 500. how huge a crowd of potential customers do you see ? :)09:40
wpwrakthings will get better once we're out of the hacker niche09:40
wolfspraulmilkymist has not hit a wall of indifference imho09:42
wolfspraulif you zoom out and compare it with a calm state of mind, you realize what a bold and demanding project it is09:42
wolfspraulit's like asking people to join some quantum computing project. would you?09:42
Action: lekernel would09:43
wolfspraulI feel we increasingly get our fair chance to talk about Milkymist09:43
wpwrakoh yes. the message is coming together.09:44
lekerneloh, yes, it's getting better, but still pretty bad imho09:47
wpwrak(showwx+) someone really ought to write that M1 logic analyzer. the platform is considerably more capable than those usb LAs with tiny buffers.09:48
wpwraklekernel: when the marketing message hits the masses, you want to be prepared to deliver. that means the software has to be in great shape, you must have stock, and you must be ready to produce more quickly.09:49
wpwraknothing is worse than getting a lot of orders you can't fulfull09:50
-:#milkymist- *** Notice -- TS for #milkymist changed from 1329127021 to 125338322709:59
wolfspraulI hope xiangfu can first go through a number of educated guesses blindly (for the vga signal problem)10:01
wolfspraulthen we see10:01
wolfspraul(literally :-))10:02
xiangfulekernel, whether the fpga could send something that could permanently damage the projector? is that possible?10:04
wpwrakbtw, how good is the image quality of that laser projector ? can it really handle large surfaces ?10:04
xiangfuwpwrak, 800x480.10:04
lekernelxiangfu: no, you won't damage the projector10:04
wpwrakxiangfu:  i mean square-meters :)10:04
lekernel800x480? can it accept 4:3?10:05
wpwraklekernel: ... unless the projector's firmware has bugs :)10:05
xiangfu70"--100" from the10:06
lekernelxiangfu: when you set your laptop to 640x480, does it work?10:06
xiangfulekernel, it's support 640x480.10:06
xiangfuwpwrak, the bigger diagonal  is 70" -- 100" from the manual. with 100% complete darkness.10:12
xiangfulekernel, yes. it works fine with laptop.10:12
wpwrakxiangfu: (manual) yes ... and in real life ? manuals don't always tell the truth ;-)10:23
xiangfuwpwrak, sorry, didn't test that yet.10:24
wolfspraulthe first reason I like this projector is that we can reproduce a vga signal bug that may be more common than we currently think10:26
xiangfujust test a little. I think 4mx5m is still ok for low resolution picture. but it doesn't work with m1. so don't know if it ok with m1 rendering.10:26
wolfspraulI've heard of 2 cases (kristian paul and christophe), and from the very limited set of people that we hear back at all, that's a lot!10:26
wolfspraulso I'm happy we can reproduce this bug now, and hopefully there is actually only one bug, not several...10:27
wolfspraulthank you laser projector :-)10:27
wpwrakxiangfu: 4x5m sounds pretty good10:27
lekernelxiangfu: since it doesn't work with any of the M1 video modes, i'd start with adding sync on green10:28
xiangfu lekernel ok. will try that tomorrow. then report back.10:31
whitequarkI got my M1!15:20
wpwrakwelcome to the club ! :)15:26
GitHub132[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/cad9d3b9600022b1c4431e6d7fe50bc89274a32f15:35
GitHub132[migen/master] bus: Wishbone to ASMI caching bridge (untested) - Sebastien Bourdeauducq15:35
GitHub96[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/060426cb59630206a000828d9cd5e0884b66ca8f15:55
GitHub96[migen/master] bus/wishbone2asmi: set WM, and send 0 when inactive - Sebastien Bourdeauducq15:55
GitHub172[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/d6da88d11df5360a67e88bd1abf561ed3015459c16:29
GitHub172[migen/master] doc: update ASMI description - Sebastien Bourdeauducq16:29
GitHub106[flickernoise] wpwrak pushed 5 new commits to direct-midi: http://git.io/kNuTcQ17:00
GitHub106[flickernoise/direct-midi] stimuli: remember last MIDI value and reset control to it before starting - Werner Almesberger17:00
GitHub106[flickernoise/direct-midi] patch editor: generalized double quote protection - Werner Almesberger17:00
GitHub106[flickernoise/direct-midi] patch editor: protect double quotes also in compiler diagnostics - Werner Almesberger17:00
kristianpaulwhitequark: Great news !!20:10
GitHub139[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/8a61d9d1217110ffa02eebee83054b997ea968ba20:52
GitHub139[migen/master] bus/csr: Rename a->adr d->dat to be consistent with the other buses - Sebastien Bourdeauducq20:52
GitHub175[migen] sbourdeauducq pushed 1 new commit to master: https://github.com/milkymist/migen/commit/264be80f2de7c3dca8f7afe47a135c14ac703a1721:33
GitHub175[migen/master] Fix syntax errors and other stupid problems - Sebastien Bourdeauducq21:33
lekernelgrmbl, xst is too stupid to infer block-rams with byte-wide write enables for data widths > 32 bits21:42
wpwrakwhat does it give you instead ?21:42
lekerneltime to start a "final code transforms to work around synthesizer limitations" library in migen, I guess21:43
lekerneldistributed RAM, which fills the FPGA21:43
wpwraksweet :)21:43
wpwrakperhaps some of these limitations simply come from a desire to sell larger and more expensive chips ? ;-)21:44
larscwhat do they say? don't mistake incompetence for intent ;)21:49
wpwrakwasn't it "don't attribute to incompetence that which can be adequately explained by malice." ? :)21:49
larscor maybe it was the other way around21:50
wpwrakthat depends largely on whom you're talking about :)21:52
Fallenoulekernel: oh that's why I guess in lm32_dcache.v they put if (dmem_addr_width  < 11) then one block of 32 bit width else blocks of 8 bit width21:52
larscwpwrak: the internet knows it all http://en.wikiquote.org/wiki/Robert_J._Hanlon21:53
wpwraklarsc: yes yes, i know :) i intentionally turned it around, because it seems to make sense in some contexts. certain people appear to have a compulsion to act evilly. as if they were the stereotypical villain in a movie.21:57
lekernellet's see with ISE 13.4 ... chances are low, but...22:06
larscwpwrak: xilinx is a strategical partner of the group i'm working in. i could tell you stories... ;)22:07
lekernelseems their download server is down22:12
wpwraklarsc: we should have a qi-hw conference some day. then i could see how many beers it takes to get such stories out of you ;-)22:16
GitHub81[migen] sbourdeauducq pushed 2 new commits to master: https://github.com/milkymist/migen/compare/264be80...e11d9b922:17
GitHub81[migen/master] corelogic: support reverse in displacer/chooser - Sebastien Bourdeauducq22:17
GitHub81[migen/master] bus/wishbone2asmi: cache hits working - Sebastien Bourdeauducq22:17
larscwpwrak: hehe22:17
lekernelwpwrak: this summer in Berlin, if we can sort out a room22:17
GitHub109[milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/oIYKXA22:18
GitHub109[milkymist-ng/master] Include Wishbone to ASMI bridge - Sebastien Bourdeauducq22:18
lekernelseems it's quite hard to get anything else than a kiezparty done in this city. getting conference rooms was easier in France ...22:20
wpwraklekernel: have you pinged the folks at ccc ?22:25
wpwraklekernel: and we don't only need a room but also travel money :)22:26
lekernelthe ccc is paying a lot of money to the congress center (that's why the tickets are a bit expensive)22:28
lekerneli'd rather spend that money on speaker travel expenses22:28
wpwrakhmm. how big do you plan to make this ? i was more thinking of them helping with finding something small. they must have smaller events, too.22:29
lekernelif all else fails, we'll do it somewhere else22:29
lekernel300-500 people I think22:29
wpwrakthat's pretty big22:31
wpwrake.g., at its peak, OLS had ~650 attendees. that's with 3-4 parallel sessions etc.22:32
wpwrakand they needed about a year to prepare the event. not entirely sure about the team size. something around ten people.22:33
wpwrakanother useful contact could be the organizers of linux-kongress22:34
lekernelnot so big... the three zero-budget events I have organized had 150-200, and that was without too much publicity effort22:35
wpwrakwell, there, the location changes from year to year and so do the local organizers. but there you'll find people who have experience with medium-sized conferences.22:35
wpwrak150-200 sounds manageable. and you've done this before. very good. i was a bit worried about that :)22:36
lekernelI'm pretty confident we can reach 300 with a very exciting programme and better publicity22:36
wpwrakit's not so much a question of getting a lot of people interested but one of crowd management :)22:37
lekernelyes, I've done it before, but (1) without budget, which also means less work (2) with fewer attendees (3) with less problems with finding a venue22:55
lekernelbut no challenge no fun, right? :)22:55
wpwrakyeah ;-)22:58
wpwrakthe budget complicates things. raises attendee's expectations. and you'll probably also have to do some paperwork for taxes and such22:59
lekerneloh, I have a professional accountant on the team :-)22:59
wpwrakheh ;-)22:59
lekernelthe #1 problem we have at the moment is that every single venue we have contacted is either very expensive, very dismissive, or too small23:00
wpwrakwhat do you mean with dismissive ? people who are difficult to negotiate with ? or just a dump ?23:02
lekernelpeople not answering emails or being evasive... we've contacted the deutsches technikmuseum and they really are a pain23:04
wpwraksometimes it helps to just call them :)23:05
lekerneloh, sure, we did23:06
lekernel4 times already, plus two visits in person23:06
lekerneland we'll call them already tomorrow23:06
wpwrakso it's not a lack of effort from your side23:06
lekernelno... I don't quite know what's on their mind, hopefully we'll know more tomorrow23:07
lekernelit'd be a great location if we can establish a good contact with them23:08
wpwrakhave you considered a university ? they have lots of empty rooms during the summer vacation23:08
lekernelin progress, but slow. and it seems they do charge for the rooms, though I don't know how much.23:09
wpwrakyou'll probably need some inside support. maybe guug (linux-kongress) can help you find a contact. or warn you of places that are a waste of time23:10
lekernelwhen I did it at a French uni in 2010 I got three rooms for free with something like 2 meetings + 1 phone call + 1 letter written in 10 minutes23:11
lekernelseems things aren't so simple here :(23:11
wpwrakgerman thoroughness :)23:13
wpwrakwolfspraul: the weird little corner of the jtag board does actually have a use: it helps you to align the board with the connectors. otherwise, you would have to "feel" for correct alignment. sort of fumblish.23:23
wolfspraulcan m1 know how much power each usb socket consumes?23:55
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