#milkymist IRC log for Wednesday, 2012-02-01

cladamwwpwrak, in 'ledm' sch, you used 220 ohm for all?02:51
cladamwwpwrak, and P1 and K1 connect to M1 J22? should mark J21?02:52
wpwrak(220 Ohm) but lemme recalculate the current ...02:53
wpwrakerr yes. J21 :-)02:53
wpwrakdamn those time travelers ! :)02:55
cladamwyou wrote LTST-C190KRKT  is 5 times less then APA1606SURCK? is that for your meanings?02:55
cladamwtime travelers. don't understand it. :)02:55
wpwrakthe LEDs i used are LTST-C190KRKT (i have ton of them). but at 20 mA, they're rated at only ~50 mcd, while the one we'll use is ~250 mcd02:56
wpwrakso M1r4 should be much brighter than ledm02:56
wpwrak(time traveler) J22 doesn't exist yet, but i "used" it02:57
cladamwawpwrak, i'm following : http://lists.milkymist.org/pipermail/devel-milkymist.org/2012-January/002650.html03:00
wpwrakwolfspraul: back in china ?03:00
wpwrakcladamwa: does it look good to you ?03:02
wolfspraulyes, back03:02
wpwraknow the jetlag :)03:03
cladamwawpwrak, i'm reading carefully your words in threads. regarding to two status LED ("booted" and "rendering"), you said 'only one would stay', does this one is the for which one? How we call that one meaningfully?03:07
wpwraki would keep only "booted". "rendering" isn't so useful. particularly now that we have an army of indicator leds03:09
cladamwamy last 20120120 version is 3*3*2 matrix, so I'll change their 'marked text' firstly.03:09
kristianpaulIf any one using Fedora 16, please install urjtag from repos https://admin.fedoraproject.org/pkgdb/acls/name/urjtag?_csrf_token=c9b4592707db079f0bacf3399a53a543ef25ffd603:10
kristianpauland give it a try03:11
kristianpaulI'll try to mofe to F16, will not been soon, i still need space to backup and reinstal and deal with bios minor issues :)03:11
kristianpaulgn8 !03:11
cladamwakristianpaul, n8 !03:12
cladamwawpwrak, I'll remove D3 then keep D2 be as "booted" status same as rc3 for like 'dimly lit' condition.03:15
wpwrakcladamwa: (matrix size) will you grow it to 3*4*2 ?03:17
wpwrak(dimply lit) yup. i thought you'd want that. it served us well ;-)03:17
cladamwayes, this condition is super usefull when first reflash to know if soldering good or not, so maybe i just mark text as 'booted' in sch firstly.03:19
cladamwawpwrak, you wanted 3*4*2? i didn't see how many that we fill them all. ;-O03:20
wpwrakwolfspraul: btw, sebastien is planning to use the ffmpeg library, so that we can use frames from images in effects as well. i already warned him about patent-poisoned codecs. does ffmpeg sound okay to you, as long as it's compiled without encumbered codecs ?03:22
wolfspraulsure, why not03:23
wolfspraulthe patented stuff is h.264, mpeg03:23
wpwrakcladamwa: we currently have 16. so 3*3*2 would be enough (with two to spare). you may want to reserve a pin for another column, though. in case we need more in the future.03:23
wolfspraulI think we can feel relatively safe with Ogg, WebM03:23
cladamwawolfspraul, your 'why not' is for my 3*4*2 question?03:24
cladamwaha..seens wpwrak really wanted a 3*4*2 matrix though. ;-)03:25
wolfspraulwhatever wpwrak wants is what we want03:25
wolfspraulthat's 6 w there!03:25
cladamwaomg ;-O, okay.03:26
cladamwawpwrak, btw, from your threads, i didn't see an experiment about DC in (overriding with bjt came from your idea), didn't you?03:27
wpwrakcladamwa: no, i didn't experiment with that. i don't have any FETs.03:28
cladamwasince I don't want to use another BJT we don't have that new part in rc3 but FETs yes we have had it (i.e. Q1 2N7002).03:29
wpwrakah yes, that circuit is also something that needs checking. see if it actually works. afaik, that's never really been tested.03:31
wpwrak(2N7002) whatever works ;-)03:31
cladamwaseems that I need to do this expriment or I send part to you? since how I use fpga pin via overriding to control it?03:34
cladamwammm...letmme think03:35
wpwrakyou do it ;-) you could connect to one of the ports you can control. actually, i should add an override feature to the led matrix controller anyway. then you could use that03:37
cladamwai think i can do this myseld by using 3.3V and GND to simulate fpga pin to overriding. yeah !03:37
wpwrakhehe ;)03:37
wolfspraulwhat was the (current) end result of the crowbar discussions?03:39
wpwrakhmm, in theory, the 270 Ohm would be more correct than 220 Ohm, particularly considering that it has a slightly lower Vf than my leds. but that assumed that the I/O pins have an Ron of 0 Ohm.03:39
wolfsprauland all the other 5V protection ideas...03:39
wpwrakwolfspraul: joerg agreed that it's a good idea to keep 5 V away from 3.3 V03:39
wolfspraulyeah but there was a mail with a whole list of ideas?03:40
wpwrakthe jumper would do that in cases where one doesn't need 5 V at all03:40
wpwrakthe crowbar would do it also in cases where 5 V is around. so it's better03:40
wpwrakbut also more complex03:40
wpwraknot sure if anyone feels strongly enough about it to implement and test that crowbar03:42
wpwrakthe jumper, on the other hand, is as easy as it gets ;-)03:42
wolfspraulif most people never use 5V, the jumper devalues the crowbar as well03:43
wolfspraulbecause if we ship boards with the jumper off, then no 5V in the first place03:43
wolfspraulok, I see it's still at the same state03:44
cladamwawpwrak, with rough an Ron of 0 Ohm should be enough to esablish this LED ON/OFF status, so if 270 Ohm then we stick this.03:44
wolfspraulalright then, let's first settle the leds, then onto j21/j2203:44
wpwrakhow big is Ron typically ? i thought it was relatively large ? if it's >= 20 Ohm, then 220 Ohm is okay. else, we should use 270 Ohm.03:46
cladamwaRon = 5 Ohm @ Idmax 115mA, http://www.fairchildsemi.com/ds/2N%2F2N7002MTF.pdf03:51
cladamwayes, i'll use 270 Ohm to test later. ;-)03:51
wpwraklovely diagrams in that data sheet :-(03:54
wpwrakbut yes, seem that we should use 270 Ohm03:54
cladamwammm. blurred one.03:56
wpwrak"we couldn't afford a better copy" :)03:56
cladamwano newer version ds though, hehe http://www.fairchildsemi.com/pf/2N/2N7002MTF.html04:04
wpwrakfor SOT-323, they did it properly: http://www.fairchildsemi.com/ds/2N%2F2N7002W.pdf04:05
cladamwaokay, need back to review your threads on that crowbar. :)04:05
cladamwa02W has Ron 1.6 Ohm typ. Not sure what difference between W and MTF type, but thier maximum spec. are quite the same.04:12
cladamwai go for lunch first, cu04:13
qi-botThe Firmware build was successfull, see images here: http://fidelio.qi-hardware.com/~xiangfu/build-milkymist/milkymist-firmware-20120201-0405/04:53
Fallenoulekernel_: I successfully synthetized modified (just lm32 + sram) milkymist-ng using migen, either in console or in ISE using generated source code. But afterward I cannot select "ISIM" as a simulator from ISE08:55
FallenouI tried running directly "isimgui", but I cannot find how to use it more than a text editor, I can only open verilog files08:55
Fallenousimulation start/stop menus are disabled08:56
lekernel_use "fuse" in command line08:56
lekernel_I never use the gui08:56
Fallenoua year or so ago I used modelsim gui it was OK09:00
lekernel_modelsim != isim09:03
FallenouI could use iverilog+gtkwave but iverilog does not know spartan6_jtag block or spartan6 DSP block (for multiply)09:05
Fallenouso it would need a few modifications09:08
lekernel_iverilog has bugs that crash it when you load lm3209:09
lekernel_same for gplcver09:09
lekernel_you can have a look at verilator, I haven't tried it09:09
lekernel_(and the author seems quite responsive for fixing problems)09:10
Fallenouok I will start on the fuse track then09:29
Fallenoulekernel_: I have the same bug you had with isim "ERROR:HDLCompiler:1654 - "../verilog/lm32/lm32_multiplier_spartan6.v" Line 47: Instantiating <D1> from unknown module <DSP48A1>"09:58
Fallenouhow did you fix it ?09:58
lekernel_Fallenou: use the normal lm32_multiplier.v (without _spartan6)10:07
lekernel_they're compatible10:07
Fallenounow it complains about DCM_SP10:12
FallenouI will just comment it10:12
Fallenouand put a simulated clk10:12
lekernel_yeah don't bother with DCM's in simulation10:14
lekernel_they will just make everything more complex... use just one clock10:14
Fallenouok nice it compiled10:14
Fallenouand generated binary does not segfault10:15
Fallenouoh, and I can run the gui with ./binary -gui10:18
Fallenouand now all start/stop wave stuff are enabled10:18
Action: Fallenou excited10:18
lekernel_I'd recommend you use $display ... looking at waveforms manually is a pain10:23
Fallenouhumm I've put reg clkfx_sys_clkout = 1; always #5 clkfx_sys_clkout = ~clkfx_sys_clkout; but the clk stays at 'z'10:23
lekernel_(and someday we'll hopefully have something more powerful than $display... myhdl is pretty nice for that, we should copy the relevant bits into migen)10:24
Fallenouok but I need waveforms too10:24
Fallenouit really gives a more accurate idea of what's going on10:24
lekernel_initial clkfx_sys_clkout = 1;10:24
lekernel_and remove the =1 at the reg10:24
Fallenouweird the reset went down anyway after a few us10:24
Fallenouhow can I speed up the simulation ?10:24
Fallenouit's damn slow10:25
lekernel_you can remove the reset counter too... and use a delay10:25
lekernel_also 1 clock of reset is enough10:25
Fallenouyep ok10:25
lekernel_verilator is probably much faster than isim - if you can get it to work10:25
lekernel_which isn't always easy10:26
Fallenouok I was looking at clkin , that's why I got "z'10:26
lekernel(it's often even faster than modelsim)10:27
Fallenou(not clkout)10:27
Fallenounow I need a few instructions in sram and I'm good to go10:30
Fallenou$readmemh should work I guess10:30
FallenouI should have a working simulation environment by tonight :)10:31
lekernelyou can use $readmemh, or init= from Migen10:38
lekernelof course, if you're hand-editing the generated verilog, using init= becomes messy *g*10:39
Fallenouyep ^^"10:41
FallenouI don't want to rerun migen, it would overwrite my changes10:41
Fallenoulekernel: do you know why sram0_wishbone_adr_i has a kind of "prefix" wich is not "all 0" ?11:08
Fallenoueventually frag_sram0 end up with the good address (0 then 0x1 0x2 etc)11:08
Fallenoubut it's accessed with a weird address11:08
Fallenoufrom a wishbone point of vue11:08
Fallenoufirst accessed wishbone address is 0x0021800011:10
FallenouI would have expected 0x0000000011:10
lekernelcheck lm32_include.v11:14
Fallenoubbl eating11:16
Fallenoulekernel: looking at the first address on I_ADR_O it's trying to fetch 0x00860000 which is the EBA_RESET15:30
Fallenousomehow it gets translated into 0x0021800015:31
Fallenouok got it15:31
Fallenou860000 / 4 == 21800015:31
FallenouI_ADR_O jumps 4 by 4 cause it's addressing bytes, but wishbone divides by 4 for SRAM because it's addressing words15:32
lekernelyes, wishbone address is in 32 bit words with migen15:45
Fallenouoh ok so not just for SRAM15:48
Fallenoufor all the slaves15:48
lekernelno, it's only in bytes inside LM32 (but the two LSBs are hardwired to 0)15:53
Fallenoulekernel: weird, way_data is always 0 or invalid (red) during a simulation ...21:21
Fallenouin icache21:22
FallenouI wonder if isim is capable of simulating the caches21:22
larscdoes it toggle between 0 and red?21:24
Fallenou10 clock cycles at 0, 10 at "red"21:30
Fallenoured meaning "x"21:30
Fallenouwell not 10 but 12 to be exact21:32
Fallenouit's the same for way_tag21:32
larscand read_data too?21:33
Fallenouoh, I think I have an idea, I have the net "refill_way_select" always at X21:33
Fallenouread_data ?21:34
Fallenouthere is no wire read_data21:34
Fallenouthe read_data of the "way data" ram is way_data21:35
Fallenouthe read_data of the "way tag" ram is { way_tag, way_valid }21:35
larscah sorry, i was in dcache.v21:37
larscbut still way_data is driven by read_data of the way_data ram21:38
larscand write_data is refill_data21:40
FallenouI must say my associativity is at 121:42
Fallenouso it's normal refill_way_select is at X21:42
Fallenouit's not used in the design21:42
Fallenouway_valid is never "X", funny21:46
Fallenouit should be driven by a blockram the same way as way_tag is :o21:47
Fallenouit comes from the same read_data output21:47
larscthat wouldn't be surprising if the blockram works fine, but the data that goes into it is already X21:51
Fallenoumaybe it's because of enable which toggles a little bit21:53
Fallenoubecause of stall_a21:53
lekernelFallenou: have you simulated it before your modifications?21:54
lekernelbecause I did it... and it works... I even got the BIOS prompt etc.21:54
lekernel(with the original soc ofc)21:55
Fallenounop I haven't21:55
Fallenoubut I didn't modify the icache21:55
Fallenounot a bit21:55
Fallenoubut yes maybe I did something wrong in the top module21:55
Fallenoua screenshot of what I get21:57
Fallenoudamn it's small on imageshack21:58
Fallenougoing to sleep21:59
Fallenouok good to know it worked for you lekernel will try to spot the problem later21:59
lekernelwell, actually I have never had a look at how the lm32 cache works in detail ...22:00
lekernelso I can't answer off the top of my head22:00
wpwrakhmm, i think i finally found a construct that blows verilog's poor little brain22:06
wpwraktrying to "assign" in a for loop. xst seems rather unhappy.22:07
wpwraklekernel: maybe there's a reason for migen after all :)22:07
wpwrakah, wait. there are these magical genvars. let's see ...22:08
wpwrakkewl. that seem to work. yet more blocks with mandatory naming, though22:18
Action: larsc never names any blocks22:20
dvdkparanoid question about MM1-jtag:22:21
dvdkhttp://en.qi-hardware.com/wiki/Milkymist_JTAG-serial_daughterboard says "never hotplug the daughterboard".  I guess that refers to the DIL connectors and not the usb mini-b port of the board?22:22
lekernelthough be careful when hotplugging the mini-b port - do not accidentally touch stuff that may cause short circuits22:23
dvdkwell, trying hard not to cause a static discharge into the MM1 (which is just lying without housing on my table)22:24
lekernelbest is to 1. connect the USB cable to the mini-b port 2. connect the JTAG pod to the M1 3. power on M1 and connect the other end of the USB cable22:24
dvdkuh, 3 steps.  I'm really spoiled by plug&play.22:27
wpwrakdvdk: in the longer run, you may want to get rid of the cute angled cable and use a straight cable, with a hole in the sidewall22:27
larscactually it's 4 steps ;)22:27
wpwrakdvdk: that way, you can close the M1 properly and don't have to worry about things falling into it22:28
wpwrakor even if you choose not to close it properly for quick access, the loosely placed plastic top can still cover everything22:28
wpwrakpity that there's probably no easy way to make the sidewall "configurable". well, we could make a replacement sidewall with a hole :)22:29
wpwrakwolfspraul: how's that for an accessory idea ? sell jtag board with replacement sidewall as an accessory. that way, it looks more significant :)22:30
dvdkwpwrak: can't close my MM1, as wolfspraul didn't give me any housing.  it's just a bare board on a table.22:30
dvdkhmm, I only have a single /dev/ttyUSB0.  according to the wiki there should be 2.  what's wrong.  linux (2.6.32) too old?22:31
wpwrakoh. having no case at all is nasty.22:31
wpwraklet's just hope your desk is more orderly than my junk pile :)22:31
wpwraki think just /dev/ttyUSB0 is fine. i don't have anything else either. also 2.6.32 here.22:32
larscdvdk: if there is only one, your linux is two new22:33
larsc(a.k.a. contains the milkymist usb ids)22:33
dvdksorry, was away, child doesn't sleep well22:50
dvdklsusb lists "Qi Hardware Milkymist JTAG/serial"22:50
dvdkso /dev/ttyUSB0 is a serial console?22:50
dvdk(and not a jtag)22:50
dvdk'gtkterm -p /dev/ttyUSB0 -s 115200' says "device or resource busy" :(22:51
larscit shouldn't list a ttyUSB for the jtag22:52
dvdkok, but ttyUSB0 doesn't seem to work either22:52
larsclsof | grep ttyUSB?22:52
wpwrakdoes  fuser -v /dev/ttyUSB0  say something ?22:53
larscdo you use modem manager?22:53
dvdklarsc: already tried that22:53
dvdkyes, a modem-manager process is running.  which init.d-script launched it?  (debian squeeze)22:53
dvdk...killing it22:54
dvdkuh, somebody relaunches it.22:54
dvdkah, it's 'sudo  lsof'22:54
wpwrakwho's the daddy ?22:54
wpwrakthe modem-manager's22:55
dvdkpstree doesn't list one.22:55
dvdkpstree, that's you to blame :)22:55
larscnetwork-manager will restart it22:55
larscI think22:55
dvdkok, connected.22:55
larscvia dbus22:55
wpwrakwhile true; do fuser -k /dev/ttyUSB0; done   :-)22:55
dvdkbut no echo, no nothing. (gtkterm -p /dev/ttyUSB0 -s 115200)22:56
wpwrakalas, it will also kill your terminal :)22:56
dvdk(already killed the offending process, had a detached 'screen' on ttyusb0, an earlier experiment)22:56
wpwrakisn't it 57600 bps ?22:56
dvdknot according to http://en.qi-hardware.com/wiki/Milkymist_JTAG-serial_daughterboard22:56
dvdkis the std flickernoise sw listening on the serial console?  or do i need to boot it into some rescue mode/bios?22:57
wpwrakyeah, 115200 bps here too22:58
wpwrakyes, it listens22:58
dvdkhmm, trying to reboot the mm122:58
dvdkok, the mm1 software was frozen (did it freeze when I connected the usb cable?)22:59
dvdk(only have one monitor, can't see the mm1's output while typing here)23:00
dvdknice, now I have an rtems shell :)23:00
Action: dvdk is cleaning up teh wiki page a little23:00
dvdkBTW another question about flashing:23:01
dvdkwho defines the bitstream start addresses in the flash?  is this a hardcoded property of the spartan6 chip?23:02
dvdk(just wondering what I have to do to install an alternate bitstream, like, say a bitcoin miner)23:02
larscthe standby bitstream is flashed at 0x0, isn't it?23:05
lekernelit's at 0 and then the standby bitstream gives another address23:05
dvdkuh, so you actually have a bootstrap process, whereby one FPGA design controls loading of another design?23:06
dvdkhopefully that's described in one of the many Xilinx pdf documents about the spartan6?23:07
lekernelyes, search for "spartan 6 multiboot"23:07
dvdkThe "xc3sprog" tool mentioned in the wiki page, does that come with urjtag?23:10
lekernelbut as far as I'm concerned... I'd prefer you work on the MM SoC which took me years to develop, rather than some stupid bitcoin miner23:10
lekernelwe don't use xc3sprog, just urjtag23:10
dvdklekernel: the bitcoin miner was just an example.  but i'll need a step-by-step approach, synthesizing a two-liner that blinks the LED etc.  currently the stack fpga+rtems+flickernoise is a little mind-boggling.23:11
wpwrakinteresting ... this  assign ledr[i] = ovr_row[i] ? z_row[i] ? 1'dz : d_row[i] : ledr_reg[i];23:11
wpwrakis accepted but produces the following code generation warning: Unit system: 7 internal tristates are replaced by logic (pull-up yes): ledm/ledc_reg<0>, ledm/l [...]23:12
wpwrakand of course, the result behaves strangely23:12
lekernelwpwrak: didn't I write something about synthesizer bugs regarding tristates ..?23:12
lekernelI don't remember if it was on the milkymist list or in some private emails23:13
wpwraklekernel: so how do you work around them ? :)23:13
larscone input signal, one output signal, one output enable signal and a tristate io buffer23:14
lekerneluse an OE signal and then "assign pin = OE ? value : 1'bz"23:14
lekernelafaik the synthesizer always recognises this construct and maps it to a tristate buffer... if you wander away from it, you can encounter weird problems23:15
wpwraklarsc: how do i get such a tristate buffer ? all the examples i found just use 0/1/Z23:15
wpwrakhmm. promises to get suckish with OE ...23:17
wpwrakmaybe i rather change the logic of the whole beast23:17
wpwrakgit stash ... new try, new luck ...23:19
larscwpwrak: what lekernal wrote23:19
wpwrakscary. implicit OE but with unreliable heuristics23:20
lekernelanother problem migen would prevent you from running into btw :p23:21
wpwrakhmm. how ?23:21
lekernelno tristates :)23:21
wpwrakha ha :)23:22
lekerneland only (OE, I, O) triplets can be converted to off-chip I/Os, using the bug-free synthesizer construct only23:22
lekernelthere are no internal tristates in modern chips anyway23:22
wpwrak(triplets) okay, that's better23:22
lekernelXst breaks down your construct using 'z into OE/I/O right at the I/O buffer23:23
lekernelsometimes it does it right, sometimes not23:23
wpwrakyeah :)23:23
wpwrakit's just puzzling that the logic falls apart quite so quickly23:24
wpwrakthe semantics of my expression are still unambiguous23:24
lekernelyou think so... but maybe there's some obscure gotcha of the verilog standard involved ;)23:24
lekernelor maybe it's a plain xst bug23:25
lekernelactually I do not want to know23:25
wpwraki guess we'll never find out :)23:25
wpwrakfunny. doens't even warn about 3'b0111.23:27
wpwraki find the compiler's lack of interest in correctness a little disturbing ...23:29
larsclekernel: can we rename .eq to .assign or something?23:30
wpwrak.be ? :)23:31
lekernelwhy? .eq is nice23:31
lekernel.be is very generic23:31
lekernel.assign is too much typing23:31
larscif i read eq i always have to think of ==23:32
wpwrak"there be light". clear and concise :) i think people who dislike "be" don't think of it as an imperative23:33
wpwrakbut yes, "eq" is bad23:33
wpwraklekernel: maybe add a preprocessor with a nicer syntax ? :)23:33
wpwrakthen use whatever python finds convenient to handle at the backend23:34
wpwrakthat would also save you from having to go too deeply into bytecode introspection and such23:35
larscbut we want all the meta programming we get by using python23:37
lekernel.asg ?23:38
wpwrakyou could still accept regular python syntax at the right places23:39
wpwrakugly and uglier :)23:39
wpwrak.set ? .let ? heck, run sed 's/:=/.assign/g'  :)23:39
wpwrakor maybe  s/\.=/.assign/  :)23:40
larscor use lambda functions and byte code analysis23:41
lekernelunfortunately there's no good way to tell python to run a preprocessor on a module import23:41
lekernelso we'd have to use temporary files, which create a mess, and can go out of sync23:41
wpwrakyou could write a wrapper than preprocesses the code and then call python23:42
wpwrakand you don't need temp files23:42
wpwrakunix has pipes :)23:42
lekernelbut what if you have a module that contains some FHDL, and you import that module from another source file?23:43
larscimport files don't come through pipes23:43
wpwrakfor pipes, see milkymist/tools/asm/pfpuasm.c:cpp   it's pretty easy23:44
lekernelwe'd have to modify python, write a PEP (which appears to be a lot of "paperwork"), get it rejected/rewritten a few times, finally get the patch merged, then wait for it to appear in distros, ... :)23:44
wpwraki think i'll remain sceptical about the suitability python as a language for such things :) it was already hard for my TMC package and you're doing much more advanced things here23:46
lekernelwhat's the damn problem with it?23:47
lekernelcommas and .eq ?23:47
lekernelthat's about as far as it goes23:47
lekerneland those are problems that can be solved with a preprocessor, as you pointed23:49
wpwrakmaybe also [x:y]. of course, this may be a case of having to choose between equally evil evils23:49
wpwrakyup. preprocessoes rule :)23:50
lekerneland the only problem with that preprocessor is that it needs a python modification to be done properly23:51
lekernelwhich brings in all the typical upstream problems, which are looking very bad for python23:52
wpwrakmaybe a libc wrapper could do the trick23:52
lekernelhahaha :)23:52
wpwrakremap fopen, etc.,23:52
wpwrakit's been done before :)23:52
lekernelbut then you need to set LD_PRELOAD every time you run python code that uses migen... not very friendly23:53
wpwrakwell, you probably have a short shell script for that anyway, don't you ?23:53
wpwrakor at least you could have one23:54
lekernelquite ugly ...23:54
larscjust use assign23:59
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