#milkymist IRC log for Thursday, 2011-11-10

wpwrakhmm, i could have described that bug in fewer words ...00:14
wpwraklemme rewrite that ...00:21
wolfspraulwpwrak: do you want the LV3 shipped to you with or without an invoice?01:43
wpwrakah, better to do everything strictly by the book01:44
wpwrakthe argentine administration is currently running mad. today, they technically shut down all imports.01:44
wpwrakbut they lifted that later on01:45
wpwrak("until further notice")01:45
wolfspraul"by the book" sounds great, but what does it mean?01:45
wolfspraulyou get the unit for free01:45
wolfspraulas a gift01:45
wpwrakso the fewer excuses customs get for creating trouble, the better01:46
wolfspraulthat's reality, "by the book"01:46
wpwrakah, attach some small price. USD 100 or such.01:46
wolfspraulso much for "by the book" :-)01:46
wpwrakit's from china, right ? ;-)01:47
wolfspraulby the Chinese book01:47
wpwrakeverything is cheap in china :)01:47
wolfspraul(actually it's from Germany, and I think most of his supply chain is in Germany too)01:47
wpwrakincluding faderfox clones ;-))01:47
wpwrakwill he send it directly ? or via you ?01:48
wolfspraulwell I very much hope directly01:49
wolfspraullet's see01:49
wolfspraulI'm so slow again01:49
wolfspraulwill reply in the next hour or so, cc you as before01:49
wpwrak(cc) great01:49
wpwrak(slow) flu still on ?01:49
wolfspraulno no01:50
wolfsprauljust too many things, spread too thin01:50
wpwrakactually, thinking of it, perhaps declaring it as an evaluation sample without value may work better01:52
wpwrakthat might trigger the "no samples" prohibition at customs, but that should only result in them putting their own value (i hope)01:53
wpwrakyou/he could still specify a pro forma price, just in case01:53
wpwrakbecause, if it comes with a real invoice, that could run into the new tax agency's madness. and then i would have to prove the payment01:54
wolfspraulactually I just realize we have a shipment of another m1 rc3 scheduled, after the final rc4 design verification, which depends on selection of the final reset ic :-)01:54
wpwrakah yes. and maybe a ben for miriam, too :)01:54
wpwraki actually thoght you had planned to get the LV3 to  HK/CN first, so that you could have a look at it as well :)01:55
wolfspraulwell sure01:55
wolfspraulI need more01:55
wolfspraulbut which?01:55
wolfspraultypically when we try to stack too many things together, it's all stuck01:56
wolfspraulwe are already moving there now01:56
wpwrakyeah, that's true01:56
wolfspraulmiriam waits for a shipping opportunity01:56
wolfspraulrc4 reset ic not selected yet01:56
wolfspraulthus adam cannot order01:56
wolfspraulthus adam cannot prepare the rc3+fixes for you01:56
wolfspraulnow the controllers01:56
wolfspraulgordian knot01:56
wpwraknot quite ... yet ;-)01:57
wpwrakgimme 3 min to finish my dinner01:57
wolfspraulI will ask faderfox to ship two lv3 out asap01:57
wolfspraulso that's moving01:57
wolfspraulthe one to Berlin should be there in a few days01:57
wolfspraulthe one to you later01:57
wolfspraulin fact I need to get an m1 to him01:57
wolfspraultake your time, enjoy01:57
wpwrakokay. dinner finished :)02:00
wpwrakregarding reset, i think with ~4.0 V chip, it ought to be safe, although imperfect02:01
wpwrakfor perfection, all power rails going to FPGA core and NOR would have to be monitored02:02
wpwrakright now, i have that ~4.4 V chip, and it doesn't act up in steady operation. don't know how it likes me connecting peripherals and such, though02:03
wolfspraulcannot follow02:06
wolfspraulperfection, imperfection ?02:06
wolfspraulwhich chip is good, which one should we settle on?02:06
wpwrakthe "run reset chip from 5 V rail" solution has the imperfection that it's an unregulated input02:07
wpwrakso that could - in theory - vary widely without affecting the rest of the system02:07
wolfspraulbut your tests show no problems, afaik02:07
wpwrakin practice, the amount of badness there is limited. so i think it may be safe, particularly if we use a 4.0 V reset chip (instead of the 4.4 V chip i have)02:08
wpwrak(my tests) correct. but so far they're not very demanding either02:08
wolfspraulis the 4.0 chip sufficiently better than the 4.4v chip to justify the additional spending of time and risks to try that one?02:09
wpwrakthere are two types of "my tests": 1) the NOR corruption ones. they consisted in senselessly hammering the system. these results do look very good. i still need to do a bigger run, but i don't expect surprises.02:09
wpwrak2) unintended consequences. such as resets caused by transients. i haven't explored into that much yet.02:10
wpwraki'd feel safer with 4.0 V :-) 4.4 V could respond to very short transients that shouldn't go as deep as 4.0 V02:11
wpwrakparticularly if the power supply is already well < 5.0 V02:12
wolfspraulthat safety costs time and money02:14
wolfspraulok then, so which one? can we pick one?02:14
wpwraksame model. 4.0 V version02:14
wolfspraulaw_: you there?02:15
wpwrakif we want to get more fancy, it would be the chip suggested on the list. with three inputs and a few extra components. nothing crazy, but more complex.02:16
wpwrakit would have the advantage of operating behind our regulators. i.e., it would monitor the real voltages that go to the FPGA et al., not the common input02:17
wpwrakso the 4.0 V chip would provide a worst-case interpretation of the power situation02:18
wpwrakeach time it errs, there would be an unnecessary system reset02:18
wolfspraulthe simplest solution that we believe works should do02:18
wpwrakbut i don't quite know yet how often such an error would occur. maybe never :)02:18
wolfspraulwe cannot always err on the side of 'safety' otherwise we cannot build hardware02:19
wpwrakthen i'd go for 4.0 V, single input02:19
aw_wolfspraul, hi02:19
wpwrakwe already know that 4.4 V, single input works in at least one case. so that's a good start ;-)02:19
wolfspraulaw_: it sounds like we want to switch the reset ic to the 4.0v variant of the same chip02:21
wolfspraulbut this time let's just buy 5 or so of them02:21
wpwraki don't think they're very expensive :)02:22
aw_so will wpwrak and you want to confirm this 4.0V chip on my site firstly after buy 5pcs?02:22
wolfspraulaw_: the plan is like this: you buy some of the 4.0v variant reset ic, then you rework your own rc3 + another rc3 with all proposed rc4 reset changes02:22
wolfspraulthen we ship that rc3+fixes board to Werner for double-checking02:23
wolfspraullet's also do the gate fix on those 2 boards02:23
wolfspraulso the entire circuit should be like on rc402:23
wpwraki think 4.0 V is a safe change from my 4.4 V. so i don't think i need to try this first myself. i can always do torture testing later.02:23
wolfspraulwhat I want is that Adam does a full rework on 2 boards, his own and one we send to you02:24
wolfspraul'full' meaning with the final circuit as proposed for rc4, including reset ic and gate02:24
wolfspraulwe have fiddled around this so long, I'm worried there are misunderstandings as to what the final one should be now02:24
wolfspraulwpwrak: can you make a quick partial drawing of the final rc4 reset circuit?02:25
aw_so which one will be sent to me from someone?02:25
wolfspraulthere we start02:25
wolfspraulaw_: here is the process02:25
wolfspraulyou source 5 or so of the new 4.0v reset ic02:25
wolfspraulyou understand the complete rc4 reset circuit, with gate, reset ic, whatever02:26
wolfspraulyou rework _two_ boards with that proposed rc4 circuit, one your own board, and another one to be sent to Werner after you reworked it02:26
wolfspraulyou ship that rc3+reset fixes board to Werner02:26
wolfspraulthat's all02:26
wolfspraulif we are able to execute this, everybody should have the same reset circuit in mind, and we double-check it sufficiently in terms of rework and testing02:27
wpwrak(and please include the usual case elements. minus the button parts - i now mill them myself ;-)02:27
wolfspraulfirst I'm worried that the rc4 circuit is clearly understood02:29
wolfspraulI highly doubt that is the case right now02:29
wpwrak(partial drawing) yeah. need to remember the latest net after the reset chip, too. that'll be something for tomorrow. dinner with wine doesn't go well with design :)02:29
wolfsprauloh sure, no rush02:29
wpwrakyes, we have two sides - the reset chip itself, and what happens with its output02:29
wolfspraulok then02:30
wolfspraulaw_: can you source those 4.0v reset ics?02:30
wolfsprauljust 5 or so02:30
wpwrakthe output is "solved" now, but in an ugly way. and the "official" design (schematics) is even worse02:30
wolfspraulwpwrak: yes they are 'cheap' but I should keep a checklist how often someone tells me this or that special case (=loss) is 'cheap'02:30
wolfspraulonly 100 USD here02:30
wolfspraulonly 50 USD there02:30
wolfspraulonly 500 USD here02:30
wolfsprauland so on02:30
wpwraknaw, the chip are trivial. the shipping isn't :)02:30
wolfspraulin hardware, all that is irretrievably lost02:30
wolfspraulone fundamental difference between hardware experiments and software experiments02:31
wpwrakau contraire. in hardware, you still have the chips ;-)))02:31
aw_wpwrak, http://lists.milkymist.org/pipermail/devel-milkymist.org/2011-July/001738.html02:31
aw_wolfspraul, yes, but second...checking now the real p/n02:31
wolfspraulthe cash flow :-)02:32
wpwrakaw_: thanks ! :)02:32
wpwrakbut meanwhile, we've also eliminated INIT_B from the equation02:32
wpwrakdo there's now only one gate left, from reset to FLASH_RESET02:33
aw_wpwrak, yes.02:36
wolfspraulah ok, good. seems we are keeping track :-)02:37
wolfspraulwe should probably cleanup this page as well http://en.qi-hardware.com/wiki/Milkymist_One_RC3_Known_Issues02:37
wolfspraul(after werner sent his new drawing)02:37
kristianpaullekernel: nice way how do you modified M1 bios in the TDC core :)02:37
wpwraklekernel: sorry, i forgot - do you prefer an AND gate for RP# or an open-collector driver with IO_L48N_1 mixes in with a pull-up ? i think it was AND, but I'm not 100% sure02:38
wpwrakAND would be 74AUP1G08whatever02:39
kristianpaullekernel: btw anything you had learn from that SPEC board, you wished to adapt in M1 One?02:40
aw_wolfspraul, I'll cleanup that page.02:40
aw_wpwrak, do you mean this one: http://tw.mouser.com/ProductDetail/Diodes-Inc/APX803-40SAG-7/?qs=2Z08r0Wtf%2fxGwS0Y5i29kg%3d%3d02:41
aw_wpwrak, APX803-40SAG02:41
wpwrakyeah. that one02:42
aw_i think i do source after wpwrak send new drawing. ;-)02:42
wpwrak(or any compatible chip :)02:43
wpwrakthe input protection will kick in around 5.5 V, right >02:46
aw_it supply voltage is 5.5V for APX803 series, your board now is soldered APX803's VCC pin to m1 net '5V' exactly, right?02:51
aw_hmm...i realized one thing we forgot: if we use 4.0V reset ic, how m1 can protect DC jack with over-voltage said over 5.5V?02:53
wpwrakdoesn't the current protection circuit take care of this ? the APX803 is good up to 6 V02:54
aw_hmm...we had have zerner diode already there. good then 5.6V > 5.5V to be protected02:54
wpwrakaye :)02:54
aw_current protection system is 5.6V...phew...then m1 are safe in rc4. ;-) good02:55
wpwrakhehe :)02:55
aw_6 V is its absolute voltage. great. :-)02:56
wpwrakplenty of room ;-)03:00
lekernelwpwrak, AND gate08:51
wpwrakgood, a bit cleaner that way09:12
lekernelwpwrak, the doc http://www.rtems.com/onlinedocs/doc-current/share/rtems/html/c_user/c_user00114.html says it's OK to send messages from ISRs, so it seems you've found a rather surprising bug in RTEMS...10:21
lekernelunless it's a LM32-specific fuckup10:21
wpwraklooks pretty platform-independent to me :)10:24
Fallenou~/win 4110:24
wpwrak(documentation) good. flush isn't allowed.10:25
Fallenouwpwrak: I think RTEMS will have to give you a medal !10:25
wpwrakactually, i think they could allow reception in ISRs. at least at a quick glance, it looks safe. (provided that it's non-blocking, of course)10:26
wpwrakFallenou: it is a little surprising just how much one can dredge up in just a few days, isn't it ? :)10:27
wpwrakin any case, MIDI now works :)10:43
Fallenouwell done :)10:51
GitHub90[milkymist] sbourdeauducq created v1.0 (+12 new commits): http://git.io/ohRgdA11:18
GitHub90[milkymist/v1.0] Enable ISE 13.2 BRAM silicon bug workaround (Xilinx AR 39999) - Sebastien Bourdeauducq11:18
GitHub90[milkymist/v1.0] Bump version number - Sebastien Bourdeauducq11:18
GitHub90[milkymist/v1.0] lm32: sync to upstream v3.6 sources - Michael Walle11:18
GitHub49[milkymist] sbourdeauducq pushed 2 new commits to master: http://git.io/_wZeIA11:33
GitHub49[milkymist/master] gdbstub: fix off-by-one error (Michael Walle) - Sebastien Bourdeauducq11:33
GitHub49[milkymist/master] Update gdbstub rom - Sebastien Bourdeauducq11:33
GitHub91[milkymist] sbourdeauducq pushed 2 new commits to v1.0: http://git.io/lC6MRA11:33
GitHub91[milkymist/v1.0] gdbstub: fix off-by-one error (Michael Walle) - Sebastien Bourdeauducq11:33
GitHub91[milkymist/v1.0] Update gdbstub rom - Sebastien Bourdeauducq11:33
lekernelhmm... sould I backport RTEMS/YAFFS upstream support into FN stable_1.0? this would make maintainance easier ...13:31
lekernelwpwrak, there are no more regressions in FN HEAD, right?13:33
lekernelrejon, what's that february trip to moscow?14:57
rejontransiberian sharism conference on train from moscow to beijing, with big music event at the end14:58
rejonrenting out a train car to do fun projects14:58
lekernelhaha, sounds like fun15:01
lekerneltaking the train on the way back too?15:02
wpwraklekernel: (head) none that i know of. but i haven't done very comprehensive testing yet.15:59
lekernel#define CPU_STRUCTURE_ALIGNMENT __attribute__ ((aligned (8)))16:12
wpwrakoh, right16:30
lekernelthis seems strange that so many things are set to 8...16:32
lekernelis that just an oversight?16:32
wpwrakdunno. maybe because doubles are 8 bytes ?16:44
lekernelwith soft-fp, it doesn't matter, does it?16:48
lekernelthe MIPS BSP aligns structure to cache lines... not sure if it matters16:48
wpwrakcould there be hard-fp ? or is lm32 always soft-fp ?16:48
lekernelalwys soft fp16:48
wpwrakcache lines are a performance optimization :)16:49
lekernelyeah, but does it matter to align structures on cache lines?16:49
wpwrakit often helps, given that you often have "busy" elements at the beginning of the structure. that way, you may need only one line instead of two.16:50
wpwrakbut this won't affect code correctness, just efficiency16:50
lekernelso, should we use the correct MM SoC cache line length instead?16:51
lekernel(32 bytes for L2)16:51
lekernelwe need efficiency :)16:52
lekernelinefficiency = low FPS = bugs :)16:53
lekerneli'll give it a go, worst cast it'll use a tad more RAM, which doesn't matter at all16:55
wpwrakdepends a bit on how large the structs are and if the elements are properly ordered. this is a whole branch of science ...16:55
wpwrakyeah. can't hurt16:55
wpwrakto get a clearer picture, you would need to make performance measurements.16:55
lekernelyeah sure16:56
wpwrakand maybe even run the thing under something like cachegrind. that would tell you what exactly is going on.16:56
lekernelwell, let's pick our battles :)16:56
wpwrakyou could replace audio input with a PRNG and then whole process should be 100% reproducible and free from time dependencies. that would help a lot with evaluation. it's always nice if you don't need to run things a thousand times just to get those numbers to converge :)16:58
lekernelaudio DMA's into the L2 cache, and the CPU invalidates L1 after DMA... so this won't be 100% accurate if you want to go nitpicking17:00
lekernelmay still provide a decent model, though17:01
wpwrakah, interesting. dma into cache. nice :)17:04
lekernelyeah, it's simple to implement17:07
lekernelif we DMA to DRAM, it takes more resources (bus is wider and burst only)17:07
lekerneland we have to take care of L2 coherency, which either increases complexity and resource usage even more, or invalidate L2, which may be slower than DMAing into L2 in the end17:08
lekernelonly large bandwidth consumers like TMU and VGA use DRAM DMA17:08
lekerneland L2 is invalidated17:09
lekernel(though VGA uses simple coherency so framebuffer writes appear immediately on the screen... otherwise software becomes a mess)17:09
wpwrakgood. the path is clear ;-)17:19
mwallelekernel: wpwrak: the off-by-one fix is working18:16
mwallewpwrak: http://paste.debian.net/144564/19:04
mwallewpwrak: mh the backtrace seems to work for me, although the framepointer seems not to be terminated correctly after spwaning a thread19:13
qi-botThe Firmware build was successfull, see images here: http://fidelio.qi-hardware.com/~xiangfu/build-milkymist/milkymist-firmware-11102011-1916/20:07
wpwrakmwalle: hmm, looks good indeed. now i wonder why it doesn't work in FN/RTEMS20:48
wpwrakor wait, that is RTEMS20:48
wpwrakor no ? confused :)20:48
mwallewpwrak: flickernoise looked good too, at least if you break at getcwd for example20:56
wpwraklemme try ...21:00
wpwraki get this: http://pastebin.ca/209365921:02
wpwrakwith GNU gdb (GDB) 7.2, from the SDK21:02
wpwraklet's try 7.3.1 ...21:05
mwalle[mw@thanatos milkymist]$ lm32-elf-gdb --version21:07
mwalleGNU gdb (GDB) 7.121:07
wpwrakwith 7.3.1 i get the same as with 7.221:14
wpwraki like you backtrace much better ;-)21:14
wpwrakcould you upload your gdb binary somewhere ?21:14
wpwrakwait. getting it ....21:23
wpwrakgot it. thanks !21:23
wpwrakworks beautifully :)21:24
mwalleso either its 7.1 or -elf :)21:24
wpwrakhmm :)21:25
wpwraklet's try to make ./configure --target=lm32-rtems4.11-elf --prefix=/opt/rtems-4.1121:26
wpwrakconfigure runs ... paint is applied, dries, ...., ages, falls off the wall, ... glaciers grow, continents shift, ...  ah, done21:27
wpwrakno luck with 7.3.1 and --target=lm32-rtems4.11-elf21:28
mwallei guess 7.2 is borken ;)21:30
mwallebtw isnt it lm32-elf ?21:30
wpwrakdownloading 7.1a ...21:30
wpwrakdunno. configure's target magic is .. magic :) but let's try21:30
wpwrakno luck with --target=lm32-elf21:33
mwallethere seems to be only one rule lm32-*-*21:33
mwallesee gdb/configure.tgt21:34
mwallewpwrak: "info registers" is the same on mine binary and yours, isnt it?21:36
wpwrakgrmbl. doesn't work with 7.1a either. binutils then ?21:36
wpwraklet's check the regs ...21:37
wpwrakdamn. already deleted yours :-(21:37
mwallemom i'll reup it21:37
wpwrak(gdb didn't like rebuilding after a target change, so i wiped out the whole tree)21:37
mwallewpwrak: you can download it again21:38
wpwrakthanks ! downloading ...21:45
wpwrakhappily reunited !21:47
wpwrakand info reg looks very similar, yes.difference in r1021:48
mwallewpwrak: nah i just care about the register (names) itself :)21:48
wpwraknames are identical. only the value of r10 changed from 18490 to 18631. maybe that's time :)21:49
mwallemh my lm32-rtem4.11-gdb wont work at all22:02
mwalleah theres the fix missing iirc :)22:03
wpwrak7.3.1 worked out of the box for me. for 7.1a, applied the patch22:06
mwallewpwrak: btw what is 7.1a?23:14
wpwraki think 7.1a is 7.1 repackaged. there was a notice, lemme check ...23:15
mwalleah that gpl violation thing?23:16
wpwraksome generated files didn't have their real sources. a licensing technicality :)23:17
mwalleyeah heard/read about that23:17
mwalle../binutils-2.20.1/configure --prefix=/opt/lm32-elf --target=lm32-elf23:19
mwalle../gdb-7.1/configure --prefix=/opt/lm32-elf --target=lm32-elf23:19
wpwrakand it works ?23:19
mwallewell that should be the binary you got from me23:20
wpwrakah, i see. lemme try to build that ...23:20
mwallewhich was woring, wasnt it?23:20
wpwrakfwiw, the BSP has binutils 2.2123:21
wpwrakyes, your binary works perfectly. should have asked you for it days ago ;-)23:21
wpwrakGRR. still no good :-(23:27
wpwrakinteresting. yours doesn't find my sources. the one i compiled does23:31
wpwrakhere's a diff of hitting the breakpoint with  set debug remote 123:32
wpwrakthe broken one (7.1 with binutils 2.10) basically simply gives up. there are a few small differences in the registers, though ($g response)23:34
mwallewpwrak: try to set debug frame 123:37
Action: mwalle is compiling 7.1a23:43
wpwrakafk for ~30 min23:43
mwallewhere does 0x6983a0 come from?23:44
mwallemhh works for me23:48
mwalle../gcc-4.5.1/configure --prefix=/opt/lm32-elf --target=lm32-elf --enable-languages=c,c++23:50
mwallei guess thats not needed23:50
--- Fri Nov 11 201100:00

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