| wpwrak | e.g., in labsw, i get what seems to be induction from the load to the wires going to the buttons | 00:00 |
|---|---|---|
| larsc | but it will just be a small bounce, or not? | 00:01 |
| wpwrak | in a sufficiently nasty scenario, these current changes could be periodic ... | 00:01 |
| larsc | i still don't see how they could confuse the debouncer | 00:03 |
| wpwrak | so i'll err on the safe side and add a bit of extra filtering | 00:03 |
| larsc | or do you mean that the signal will never be stable? | 00:03 |
| wpwrak | the debouncer may see a seemingly stable signal for a while | 00:03 |
| wpwrak | at least in theory. it's kinda hard to test this in practice :) | 00:05 |
| wpwrak | such things come and go. i already had to go through my whole set of lab power supplies to just make simple upsets happen occasionally. ironically, M1 is about 10x more effective at causing such things. | 00:06 |
| qi-bot | The build was successfull, see images here: http://fidelio.qi-hardware.com/~xiangfu/build-milkymist/milkymist-openwrt.minimal-09112011-0135/ | 00:30 |
| larsc | hm, i suppose you could emulate edge triggered behaviour by switching between the trigger level, when the interrupt occurs | 00:32 |
| larsc | but you could miss a edge if your irq handler is to slow | 00:35 |
| wpwrak | yes, that should work | 00:44 |
| larsc | sometimes it feels as if place and route is done by bruteforce | 02:37 |
| kristianpaul | why? | 02:40 |
| kristianpaul | i mean surelly it is, but did you detected it some how? | 02:42 |
| larsc | it takes ages ;) | 02:44 |
| kristianpaul | :-) | 02:46 |
| wpwrak | larsc: what else would you expect in a proprietary and closed ecosystem where all selective pressure has been carefully eliminated ? ;-) | 06:23 |
| lekernel | wpwrak, nothing prevents you from writing a p&r tool | 07:50 |
| wpwrak | lekernel: why duplicate your fine work ? :) | 10:22 |
| larsc | lekernel: do you know any good articles/papers on p&r? | 11:57 |
| lekernel | yes | 11:58 |
| lekernel | moment | 11:58 |
| lekernel | http://www.eecg.toronto.edu/~vaughn/papers/fpl97.pdf | 11:59 |
| larsc | thanks | 12:00 |
| lekernel | there's also this super-expensive book http://www.eecg.toronto.edu/~vaughn/book/arch_and_cad.html but it's just elaborating on the paper (I read it) | 12:00 |
| lekernel | there's nothing groundbreaking in the book that you can't find out reading the paper and doing a little research | 12:01 |
| lekernel | if you still want to read it, it's available in some big libraries | 12:01 |
| lekernel | other than that one paper which isn't bad, in general you shouldn't expect much from academic research. if you want the beefy stuff, find papers and articles written by synopsys/cadence/altera/xilinx engineers | 12:05 |
| larsc | hehe | 12:06 |
| lekernel | US patent 6301693 is very interesting too | 12:06 |
| lekernel | you can also check out "Highly Efficient Gradient Computation for Density-Constrained Analytical Placement" from I¬¬¬ (you need to get past the paywall, ask me if it gives you trouble) | 12:07 |
| lekernel | but I think that for starters, a "simple" simulated annealing like in VPR would be OK | 12:09 |
| larsc | i can access ieee through my university vpn | 12:09 |
| lekernel | it seems Altera actually used an unpublished modified VPR to design the Stratix | 12:11 |
| lekernel | check out The Stratix Routing and Logic Architecture (David Lewis*, Vaughn Betz*, David Jefferson, Andy Lee, Chris Lane, Paul Leventis*, Sandy Marquardt*, Cameron McClintock, Bruce Pedersen, Giles Powell, Srinivas Reddy, Chris Wysocki, Richard Cliff, and Jonathan Rose*) | 12:12 |
| errordeveloper | lekernel: have you had a look at that vrq thing ? | 13:24 |
| lekernel | yes, well, it's just a verilog parser | 13:44 |
| lekernel | doesn't do any synthesis or p&r | 13:44 |
| errordeveloper | ok, that's what I thought | 14:37 |
| qi-bot | The build was successfull, see images here: http://fidelio.qi-hardware.com/~xiangfu/build-milkymist/milkymist-openwrt.minimal-09112011-1811/ | 17:06 |
| mwalle | lekernel: im updating the uart core documentation atm. what does THRU mean? | 18:26 |
| mwalle | it enables loopback, but what does THRU stand for? | 18:26 |
| roh | midi thru? | 18:28 |
| roh | midi thru is usually a amplified copy of the 'in' port while 'out' is something 'generated' by a midi device | 18:28 |
| roh | means the in goes into the optocoupler and its output to a) a driver (logic gate or so) and the thru output and b) the input of the microcontroller (or whatever) | 18:30 |
| roh | the out goes also to a driver and the 'out' port | 18:30 |
| mwalle | ah midi terminology :) | 18:33 |
| mwalle | roh: thx :) | 18:36 |
| roh | yeah. midi is crude ;) | 18:40 |
| GitHub120 | [linux-milkymist] mwalle force-pushed new-uart from 73ec00d to c1132a2: http://git.io/-D74Cw | 20:25 |
| GitHub120 | [linux-milkymist/new-uart] lm32: update driver for new uart core - Michael Walle | 20:25 |
| lekernel | mwalle, "thru" connects TX to RX | 20:34 |
| lekernel | and yes, the term comes from MIDI | 20:34 |
| lekernel | are you planning to convert the other cores to level-sensitive as well? | 20:38 |
| mwalle | lekernel: dunno, i want to look at the other linux drivers and make them devtree compatible | 20:50 |
| lekernel | well, either use level-sensitive or edge-sensitive IRQs in the whole SoC, but not a mix :) | 20:50 |
| mwalle | ac97? :b | 20:52 |
| lekernel | btw, what is the advantage of having only one IRQ line from the UART to LM32? (as opposed to two like before) | 20:53 |
| mwalle | well not really any advantage nor any disadvantage imho, but one irq for uart devices fits better into the linux uart core driver :) | 20:54 |
| mwalle | eg. i dont need my own uart core descriptor object just for handling two interrupt numbers | 20:54 |
| mwalle | and i need the additional bits within the core anyway for polling | 20:55 |
| lekernel | what I don't like is it wastes IM bits and duplicates its functionality in the core, but if it makes writing drivers easier, it's acceptable | 20:56 |
| lekernel | though it seems you want to use IM in the LM32 CPU-specific port and the "interrupt mask" core registers in the drivers already... | 20:58 |
| mwalle | lekernel: right, | 20:59 |
| --- Mon Sep 12 2011 | 00:00 | |
Generated by irclog2html.py 2.9.2 by Marius Gedminas - find it at mg.pov.lt!