#milkymist IRC log for Saturday, 2011-06-18

fpgaminerhmmmmmmmmm for some reason this patched code doesn't actually _read_ anything from memory01:37
fpgaminer>8(01:37
fpgaminerAnd now Quartus is fscking up the hex file generated by elf-objcopy02:23
fpgaminerHmmm ... Quartus is interpreting the addresses in the intel hex file as literal address of the altsyncram; so as 32-bit word addresses instead of byte addresses like elf-objcopy assumes02:28
fpgaminerMaybe I can write a script to fix this ...02:28
fpgaminerGreat success!03:08
fpgaminerLM32 on Altera with the amazing blinking LED BIOS :D03:09
wolfspraulfpgaminer: lekernel needs to chime in on this, but I believe if you have clean patches that would make Milkymist (or parts of it) portable to Altera, without overly cluttering the codebase or Xilinx-support, we would love to merge it back into one unified codebase03:12
wolfspraulbut I'm just saying this in general (or more asking/suggesting), without knowing the exact details of what you are currently porting and whether it makes sense to have one unified source base...03:12
wolfspraulI've heard from Sebastien before that even though our current focus is Xilinx and Spartan-6, when working on the Milkymist SoC he tried to stay away from Xilinx proprietary features to keep it an option to run Milkymist on Altera, by whoever and whenever, but to keep it a reachable goal03:13
fpgaminerhmmm03:18
fpgaminerI used code generated by LatticeMico System, with the patches from http://blog.tkjelectronics.dk/2011/02/porting-the-latticemico32-to-a-xilinx-fpga/03:18
fpgaminerBut I'd imagine the Milkymist LM32 core would run just fine an Altera as-is03:20
fpgaminerthe only reason I had trouble was because I wanted to use on-chip memory as RAM03:20
fpgaminerso I had to modify the wishbone-block ram module generated by LatticeMico System to work with Altera03:21
rjeffrieslekernel when you are ready to investigate asic this is a low entry cost vendor04:26
rjeffrieshttp://www.lfoundry.com/index.php?id=20404:26
wolfspraulrjeffries: sorry but it's so totally off I cannot even give specific feedback :-)04:37
wolfspraul900 EUR / mm2, MPW, 350/150nm, all wrong04:37
wolfspraulfirst we need an actual application (and sales forecast) where any other tech than what we are using now makes sense04:38
wolfspraulthat won't be so easy to even get to04:38
wolfspraulat that point, a 6'' wafer costs about 150 USD04:38
wolfspraulthe whole wafer, not a square mm04:38
wolfspraulbelow 500nm the fabs copyright gate-level design, so there's a big jump in 'prices' because you first need to understand what you actually pay for04:39
wolfspraulI have no idea why the lfoundry prices are so crazy high, one would need to talk with them to find out.04:40
wolfspraulthere must a be a lot of services or IP in this, or it's just something they put up on the web, and their actual business is something else04:40
wolfspraulthere are many foundries, I wouldn't be worried about it at this point at all04:40
wolfspraullots and lots of lower hanging fruits imho04:41
wolfspraulyou can check tsmc prices for older/bigger process nodes if you are interested04:41
wolfspraulbut I see no application/need for us at all now04:42
rjeffrieswolfspraul I wAS ONLY SHARING IMNFO sorry for caps04:42
wolfspraulmaybe lfoundry is going after some very specific customers/markets (there are many details/differences in the fabrication process). I don't think they will just try to compete head-on with tsmc or even Chinese fabs. That'd be crazy. There's more to the story.04:43
wolfspraulrjeffries: yes sure, it's nice. It's a foundry in Germany, so it seems.04:43
wolfspraulbut so what?04:43
rjeffriesa modest size chip (less complex than MM) only costs $6k plus some cad time04:43
wolfspraultheir prices are very high, like I said they must be going after some specific customers/markets04:43
wolfspraulwhich I don't understand04:43
wolfspraulis that 6k usd / piece ?04:44
rjeffriesyou may be right but they are set up for small runs so that is cvost effective04:44
wolfspraulis that 6k usd / piece ?04:44
rjeffriesno $5K for a [roto run rgar priduces tens og packaged tested chips04:44
wolfspraulhow many chips?04:45
rjeffriesas I said tens of chips in [roto run. first of a few runs04:45
wolfspraulwhy tens of chips? how do you do the math?04:45
wolfspraulI understand they are doing MPW wafers, which I've only heard trouble from. But ok. for some specific customers who need high-end low-volume chips they have no other choice.04:46
wpwrakwolfspraul: their business model may be fear: http://www.lfoundry.com/index.php?id=18004:46
rjeffriesread what I wrote: this service is one where to reduce mask costs they place multiple projects on the same wafer04:46
wolfspraulrjeffries: why do you think it's "tens of chips"? how many?04:46
rjeffrieswolfspraul I will go away. it doesn't matter when we are testing 1- 2- - 50 chips04:47
wolfspraulanalog & mixed signal04:47
wolfspraulI am pretty sure they go after specific customers.04:47
wolfspraulfrom a very rough reading and thinking about their website04:47
wolfspraulrjeffries: go away?04:47
rjeffriesthey guys doing this are smart and are well awate of alternatives. I think you are comparing high volume alternatives04:47
wolfsprauljust because we try to understand your comment about "low entry cost vendor"04:48
wolfspraulat least I am still reading your stuff...04:48
wolfspraulI think it's 1 chip for 6 k usd04:48
rjeffriesI dislike you attitude I am not selling anything, I have some real world [priceing for a wafer that will start in 45 to 60 days.04:48
wolfspraulyou dislike my attitude?04:49
wolfspraulha ha04:49
wolfspraul6k / chip04:49
wolfspraulron this is not a "low entry cost vendor"04:49
wolfspraulI think04:49
rjeffrieswolfspraul read my lips: $5K is for the entire proto run, but excludes some CAD costs04:49
wolfspraul"entire proto run"?04:49
wolfspraulI think they are making individual wafers04:49
wolfspraulas per the schedule on that page04:49
wolfsprauland you can buy square millimeters on those wafers04:49
wolfspraulwhich is great04:49
wolfspraulsome customers really want that04:49
wolfspraulvery low volume, very high-end applications04:50
wolfspraulwhat does "entire proto run" mean?04:50
rjeffriesI gyess you do not understand that for a small chip this can be cost effective. anyway i don't really care, please forget the whole thing04:50
wolfspraulwhy do you think you get "tens of chips" (how many?) for 6k usd?04:50
wolfspraulwell it's either one chip, or tens of chips04:50
rjeffrieswolf I do not yjink I LNOW becazuse yje group I am helping is doing this04:51
wolfspraulquite a big difference if you try to make an argument for "low entry cost vendor"04:51
rjeffriesthe $5k is indeed for the run. so either you believe or don't beleive.04:51
wolfspraulyou pay per square millimeter, right?04:51
wolfspraul1 wafer04:52
wpwrakrjeffries: so that's with all the one-time costs. convert the CAD data, check it, make masks, etc.04:52
wolfspraulif you need 25 square mm, that's 25*650 EUR at the 350nm node04:52
wolfsprauloh sure04:52
wolfspraulthere must be tons of services in this04:52
wolfspraulthis looks like a very specialized fab04:52
wolfspraulthey are going after very specific niche customers and markets (it looke like, GUESSING)04:53
rjeffriesI am not the dircet person working with the fab.as I have stated the total cost is $5K plus some CAD charges which I do not know04:53
wolfspraulso that's 16,250 EUR / 25 mm204:53
wolfspraulthat gives you 1 chip for 16,250 EUR04:53
wolfspraulthis is pretty normal in military applications04:53
wolfsprauland other high-end applications, satellites, etc.04:53
wpwrakwolfspraul: most of those services would have to be included anywhere. sending them machine-ready files would probably be quite difficult.04:53
wolfspraulwpwrak: no you can do that04:53
wolfsprauljust completely different fabs and business models04:53
wolfspraulplus standardization needs time, so you are more likely to find such fabs on older tech04:54
rjeffriesthey test and pacake and turn in 4-6 weeks. I n3ed to learn aboiut that I think we hand off VHDL04:54
wolfspraulrjeffries: first try to find out whether it's 5k for one chip, or "tens of chips" :-)04:54
rjeffrieswhen you are doing small chip the okder 159bn process node is not a big deal04:54
wpwrakwolfspraul: is the whole process 100% standardized ? or are there equipment/fab-specific variations ?04:54
wolfspraulwpwrak: there are definitely fabs that will take a mask from you in a 500nm process and just make your wafer without testing04:54
wolfspraulbut then you need to know what you are doing, we are not ready for that either04:55
wolfspraulthe older the tech, the more standardized04:55
wolfspraulI've heard below 500nm it will become fab-specific right now04:55
wpwrakwolfspraul: e.g., you couldn't just send a random panel to a PCB fab. it has to correspond to the board sizes they use (plus a few more parameters)04:55
rjeffriesdamn ity lisyen to me. for the 3rd time I KNOW repeat KNOW that that $5K is for teh group of 10-20 chips, period04:55
wolfsprauland then there are many variations/specialities in the production process, which some customers may need04:55
wolfspraulespecialy in analog/mixed-signal chips which it seems lfoundry goes after04:55
wolfspraulrjeffries: 5k for 10-20 chips04:56
wolfspraulso they make multiple wafers?04:56
wpwrakrjeffries: i think wolfgang is a bit confused about the difference between your price and what they list on their site. but maybe they have volume discounts starting at 1 ;-)04:56
wolfspraulwhy do they give per square mm prices there?04:56
rjeffrieswolfspraul the difference between you and the guys I am working with is they have a design ready to go (almost) and know other start-up that have used the same fab.04:56
wolfspraulgreat04:56
wolfspraulkeep us posted :-)04:56
wolfspraul5k for 10-20 chips is possible, of course, but it's not on the url you gave us04:57
wolfspraula 6'' wafer costs 150 USD04:57
wolfspraulor let's say 18004:57
rjeffrieswolfspraul let's nor argue. you are ignoring things like a down economy and the joy of running a line fully booked04:57
wolfspraulso that's your bottom04:57
wolfspraulyou are running your "full line" with mpw wafers? :-)04:57
wpwrakwolfspraul: as usual for small volumes, most of the cost is probably in the setup04:58
rjeffriesplease do not worrry about us. we'll do fine. have a great day04:58
rjeffriesI do not run their plant. But I think I understand how the economics work. it is really cool when you are just starting to have a low barrier to entry. the VCs like that a lot04:59
wolfspraulrjeffries: are you or your guys customers of lfoundry.com ?04:59
rjeffriesI am not teh guy working with LFoundry, as I already said. this apparently has zero interest, so let's not beat this poor dead horse.05:00
wolfspraulwhat kind of chip are you making?05:01
rjeffriesMy data is solid however. this process may not be what is needed for MM I dunno. the 150nm process node is old, 1999 but a gazillion chips are still fabbed using the old process05:01
wpwrakrjeffries: don't give up so quickly ;-) the information at the link you send says they're very expensive. then, the actual project you describe suggests they aren't. there's a mismatch of 1-2 orders of magnitude there. where does it come from ?05:01
rjeffriesthe fabs were paid for a long time ago I assume.05:01
wolfspraulold? no 150nm is very advanced05:01
rjeffriesnot reall05:02
wolfspraulplus there are huge differences between analog, mixed-signal and digital chips, and much variety in processing technology05:02
rjeffries65nm and below is advanced these days this is veryt old. wipipedia is your friend05:02
wolfspraulalright :-)05:03
rjeffrieswpwrak yoiu guys amuse me. I guess you think I failed the IQ test. the prices I have mentioned are real,05:03
rjeffriesso I don't care if people think it is bogus or not. in the real world price lists are just price lists.05:04
wpwrakrjeffries: you misunderstand. what we're curious about is what has to happen to get those cool prices. and not the way higher list prices.05:04
wpwrakrjeffries: kinda like buying airline tickets. there you can also pay for exactly the same service 10x the lowest price.05:04
rjeffriesit i sthe down economy and the realitive lack of demand keeping a fab line full is similar to running an airline05:04
rjeffriestaking off with empt seats is revenue lost forever05:05
rjeffriesin  any case there is no funding for lekernel to create an asic for now, so this is a;; noise05:05
rjeffriess/a;;/all05:06
wpwrakrjeffries: alright, so the factor is the opportune moment. and your friends were lucky to be ready just in time.05:06
rjeffriesnot sure that is correct we have multiple fab runs planned.05:06
rjeffriesthese are 200mm wafers so when this is proven one wafer will result in a metric SHITLOAD of devices.05:07
wpwrakwell, "just in time" may span a while. the economy doesn't reverse in a week. and they probably fixed the prices before starting. otherwise, there may be surprises ;-)05:07
wpwrakaaah, now we're talking05:07
wpwrakthey promised a huge order. so that's where the money would be. the USD 5k run would just be a test.05:08
rjeffriesthe VCs are smart enough to factor that all in. not really there will be several tests actually05:08
rjeffriesI am also pretty sure that list prices are a starting point for discussion in this business05:09
rjeffriesI wonder what size lekernel estimates his SOC would be as an asic (area)05:10
wpwrakrjeffries: never assume other people are smart. never assume they're stupid. there may just be wildly different interpretations ;-)05:13
wolfspraulwhat is that chip (and the product the chip is in) doing?05:14
rjeffriesgreat advice. ;) and challenging assumptions is fair. we shall see. maybe this first run really will cost a gazillion  dollars. ;)05:15
wpwraknaw, the first run will be cheap. it's the later runs that will cost :) it's not too different from how wolfgang got the ben made. his run size (1000 units) would normally be too small. but due to poor business, they agreed to take a 3k order in three chunks. (presumably with the understanding that later chunks may never happen, if the product doens't take off)05:18
wolfspraulwpwrak: in photolithography, the expensive thing is making the film, from what I understand so far05:19
wolfspraula film can be used for 2-3k wafers05:19
rjeffriesanything is possible. yup, and by sharing a wafer, that hight cost can be spread across multiple customers05:19
wolfspraulno wrong, sorry. film can be used for several years.05:19
wpwrakwolfspraul: so millions of wafers, if you want05:20
wolfspraulso what costs do we understand now? aside from not knowing much about process specialities in analog & mixed-signal05:20
wolfspraul1. wafer itself05:20
wolfspraulcheap05:20
wolfspraul4'' wafer 35 USD (according to azonenberg)05:20
wolfspraul6'' wafer 180 USD (what I was told in China)05:20
wpwrakthat's just the raw material05:20
wolfspraulcorrect05:20
rjeffriesthese ar 8 inch wafers but who is counting (actually 200mm)05:20
wolfspraulyes that's for the pros05:21
wpwrakthe machines and chemicals will cost a little, too ;-)05:21
wolfspraulthen the film is expensive, making the film05:21
wolfsprauland the fab you are working with may see some of their IP in the making of that film05:21
wolfsprauli.e. you cannot take 'your' film out and to another fab05:21
rjeffriesagree05:21
wolfspraulunless you agreed to that before, and/or you are on an older process tech, like 500nm or bigger05:21
wpwrakdunno how identical the fabs are. there may be many small variations that enter this05:22
wolfspraulonce you have a film, let's assume the film is free and you can pick a fab just to go there with film, my understanding is runs are cheap too05:22
wolfspraulyes definitely, especially in <500nm, and analog/mixed-signal05:22
wpwrakeven if they have the same machines, they may be in slightly different configurations05:22
wolfspraulyes05:22
wpwrakthere's a reason why intel "clone" their fabs :)05:22
rjeffriesI think the film (mask) is specific to the process, but I might be wrong.05:22
wolfspraulso but assuming the film is 'free', and we just pick a fab (i.e. we understand the process well enough to go to a new fab), then the making of the layers is also relatively cheap05:23
wpwraka bit expensive, but i can understand their motivation very well ;-)05:23
wolfspraulrelatively05:23
wolfspraulof course if you make more wafers, one-time costs can be shared among the wafers05:23
wolfspraulbut even at 6'', 1 wafer can yield hundreds or thousands of chips, depending on chip size05:23
wolfspraulthen there is testing, big problem05:23
rjeffriesso where is this gouing? all chips can be $0 USD ?05:24
wolfspraulI currently understand very little/nothing about IC testing process, need to learn05:24
rjeffriesrunning a fab is expensive due to tight clean room conditions05:24
wpwrakrjeffries: if you have the volume, almost :)05:24
wolfspraulI don't think so [clean-room]. there are many fabs, it's very competitive.05:24
wpwrakwolfspraul: testing probably adds quite a bit to the setup cost05:25
wolfspraulthose investments are written off same as the photolithography and other equipment, over many years and many customers05:25
rjeffriesa famous guy in semi industry said famously, maybe 15 or more years ago "all chips will cost $5 excpet for thos that cost less. "05:25
azonenberg_labYou guys talking fab?05:25
wpwrak;-))05:26
wolfspraulazonenberg_lab: hey, is that OK I used your ring oscillator assuming it was cc-by licensed or public domain?05:26
wpwrakazonenberg: is your alarm clock synced with IRC ? :)05:26
rjeffriesnot me. I entered this channel by mistake and stepped in horse poo up to my chin. ;)05:26
azonenberg_labwpwrak: No, i saw the log on my other machine when i went to grab something05:26
azonenberg_labThis is my machine in the lab05:26
azonenberg_labwolfspraul: I didnt explicitly pick license terms for it but cc-by is fine i guess05:27
wolfspraulexcellent, thanks05:27
wolfspraulI always ask beforehand, this is a big exception.05:27
azonenberg_labNo worries05:27
wolfspraulI was in a rush to make those news and couldn't grab you.05:27
azonenberg_labBe warned that it's never been tested or even analyzed05:27
azonenberg_labSo it might not quite be correct ;)05:27
rjeffriesfrom the internets: My best friend ran off with my wife yesterday..... I really miss him05:27
wolfspraulazonenberg_lab: when someone makes an entire wafer full of ICs, how are they normally tested?05:28
wolfspraulis it tested when it's still a full wafer? or is it cut into pieces first, and then each chip is tested? or only after packaging?05:28
azonenberg_labBasic testing for functionality, or failure analysis? Basic testing is a lot easier05:28
azonenberg_labYou design a probe card specific to that chip05:28
azonenberg_labIts a ring-shaped PCB with a bunch of needles pointing into the hole at center05:28
wolfspraulah wait, I took a video at Ingenic once, they were testing chips in fully packaged state05:28
azonenberg_labThe testing unit sticks that onto the bare wafer (before dicing) and checks each die05:29
azonenberg_labThe ones that fail are marked bad immediately05:29
azonenberg_labThen they test again after dicing and packaging05:29
wolfspraulok typical manufacturing, test after every step :-)05:29
azonenberg_labBut you are then more limited since you cant get to any of the test points unless they were brought out to pins05:29
wolfspraulsure, understood05:29
azonenberg_labHowever, you can now test for packaging flaws05:30
azonenberg_labSo its still necessary05:30
wolfspraulyou test along the whole way, every time for different failures and different reasons05:30
azonenberg_labYep05:30
azonenberg_labRight now, for example, I am about to do visual inspection of an in-process die to see if my hardmask has pinholes in it05:30
wolfspraulhow easy is it to take a photolithographic film from one fab to another?05:30
azonenberg_labAt least, once my hot plate gets warm enough that i can etch on it05:30
azonenberg_labIt depends a lot on the contents of the mask set05:30
azonenberg_labIf you licensed the fab's cell library you're locked into them05:31
azonenberg_labIf you used an in-house or open source cell lib (none of the fab's IP) then it's more feasible to move05:31
azonenberg_labBut you still might have to make some tweaks depending on process variaitons05:31
azonenberg_labIn my case, a consulting customer of mine has a MEMS device that was desigend completely in house05:32
azonenberg_laband is now shopping fabs for price quotes05:32
azonenberg_labto build a prototype05:32
azonenberg_labHowever right now we just have the GDS (no physical masks), some little tweaks may be needed to adapt it to their specific process before making physical masks05:32
azonenberg_labEven something as simple as switching from wet etching to lift-off means inverting the light/dark areas of the mask05:33
rjeffrieshave they checked LFoundry? I am aware of a MEMS start0up that uses the, (my project is not MEMS)05:33
wolfspraulI've heard that making physical masks is expensive, but then you can use them for several years. Is that correct?05:33
azonenberg_labrjeffries: Not sure, i'm not involved in that05:33
azonenberg_labI do simulation and wafer test05:33
azonenberg_labplus a little bit of failure analysis here and there05:33
azonenberg_labwolfspraul: They are definitely expensive to make05:33
azonenberg_labHow expensive, depends on the feature size and material05:33
azonenberg_labfor example really large masks can use film like PCBs05:33
azonenberg_labAnything below like 15um feature size (on the mask) needs chrome on glass05:34
azonenberg_laband really small feature sizes need even more exotic substrates05:34
azonenberg_labLifetime is pretty long05:34
wolfspraulok05:34
azonenberg_labthey dont get physically damaged in any way unless something scratches them, they get dirty, etc05:34
wolfspraulconfirms what I've learnt so far :-)05:34
azonenberg_labwoo my KOH is at 85C05:35
azonenberg_labTime to take this die for a swim :)05:35
wolfspraulazonenberg_lab: how big are the manufacturing differences between digital, analog and mixed-signal ics?05:35
wolfspraulalright, we let you go off to more meaningful work :-)05:35
azonenberg_labwolfspraul: I've only ever really done MEMS05:38
azonenberg_labi'm learning digital stuff now05:38
azonenberg_laband know zilch about analog - analog stuff scares me :P05:39
azonenberg_labI joke that if a circuit i built has anything other than 0, 3.3, or 5 volts on a signal during normal operation, it's broken05:39
azonenberg_labAnd I'll still be around - this is my living room fab lol05:40
azonenberg_labSo i IRC or write lab notes on the netbook while waiting for wafers to cook :p05:40
Action: azonenberg_lab AFKs for a min to toss die in KOH05:40
azonenberg_labback05:41
azonenberg_labwolfspraul: Have you been following my home fab work at all?05:42
wolfspraulazonenberg_lab: yes definitely. but where is the best place to follow?05:45
azonenberg_lab#homecmos05:45
wolfspraulah, great05:45
wpwrakazonenberg: how's the FOV coming along ? shopping for 12" wafers already ? :)05:45
azonenberg_labi've been committing lab notes every day after i finish my experiments to the google code repo in the topic05:45
wolfspraulcommiting lab notes? where?05:46
azonenberg_labwolfspraul: trunk/lithography-tests/labnotes05:47
wolfspraulhttp://code.google.com/p/homecmos/05:47
azonenberg_labwolfspraul: yes05:48
azonenberg_labwpwrak: No, i'm using 2mm square dies lol05:48
azonenberg_labdiced from a 2 incher05:48
wolfspraulazonenberg_lab: perfect, now I know how to follow05:49
wolfspraulexcellent lab notes, keep doing that...05:49
azonenberg_labwolfspraul: I also have photos http://colossus.cs.rpi.edu/~azonenberg/images/homecmos/05:50
azonenberg_labsorted by date05:50
azonenberg_labi have one of each die after just about every process step05:50
azonenberg_labwolfspraul: I was tired of people doing cool stuff but not telling other people how theydid it05:53
azonenberg_labI'm a scientist for crying out loud lol05:53
wolfspraulcool, checking (I assume them to be cc-by as well, in case I post it somewhere... if not, please let me know)05:57
azonenberg_labOk05:58
azonenberg_labI'd appreciate a link if you do share, but its by no means mandatory05:58
wolfsprauloh of course05:58
azonenberg_labAnd actually, to be techical i'd say its covered under the new BSD license05:58
wolfspraulperfect05:58
azonenberg_labSincve thats what the googlecode repo is under05:59
wolfsprauleverything will be attributed and linked, no worries05:59
wolfspraulwhich link would you give as your 'homepage'?05:59
azonenberg_labhttp://colossus.cs.rpi.edu/~azonenberg/05:59
wolfspraulwill do. thanks.05:59
azonenberg_labAnd when i said link, i meant let me know where you posted it :P05:59
azonenberg_labAs in, i'd like to hear what people think06:00
wolfspraulit takes some time for people to learn about your name, your project06:00
azonenberg_labYeah06:00
azonenberg_labIf you want to make your own renders, btw, i have Glade CAD files in the repo of it (and all of the standard cells i made to use in it)06:00
wolfspraulfirst time something new passes by, most likely we would dismiss it06:00
azonenberg_labYou can export them to GDS, DXF, or whatever06:00
wolfspraulyou are too far ahead, but we get to it :-)06:01
azonenberg_labLol06:01
azonenberg_labWell the CAD is way ahead of my fab capabilities atm06:01
wolfspraulfor me first of all is about learning more, understanding where this could apply (for me)06:01
azonenberg_labi'm still doing simple wet etching and am trying to get yields up06:01
wolfspraulmy project is copyleft hardware, I believe there is a business model somewhere at the intersection between free software and manufacturing06:01
wolfspraulso I also wonder - how can some manufacturing technology, or the resulting chip/circuit/pcb, leverage free software in interesting ways to make a really good product...06:02
wolfspraulso from your homecmos to that, it's quite a way :-)06:02
azonenberg_labOpen source standard cell libraries06:02
azonenberg_labAnd yes06:02
azonenberg_labI do hope to be able t omake 4000 series chips or similar in the future (a year or so)06:02
wolfspraulexactly06:02
wolfspraulI know06:02
wolfspraulwe will meet eventually :-)06:03
wolfspraulalso it doesn't need to be a CPU, many interesting and powerful chips can be made06:03
azonenberg_labWell yeah,  of course06:03
wolfsprauleven with bigger/older processes06:03
azonenberg_labBut the educational value of making your own 7400 or 4000 series part06:03
azonenberg_labFrom a blank wafer and a CAD program06:03
azonenberg_labwould be immense06:03
wolfspraulof course, excellent motivation and story06:03
wolfspraulcpu = heart06:03
azonenberg_lablol, yes06:04
azonenberg_labactually, this die literally has a heart :P06:08
azonenberg_labIt's a companion cube from Portal lol06:08
azonenberg_labat 60 microns per pixel (large, i'm just testing the etch rates)06:08
lekernelwolfspraul, rjeffries: why don't you ask lfoundry for a quote for 1000 chips? then you'll know.07:54
lekernelazonenberg_lab, well, I guess you can print on A0 masks and a reprography machine with good optics to feed into the microscope :)07:56
lekernelso you avoid the expensive chrome on glass07:57
wolfspraullekernel: I'm not going to ask lfoundry anything08:19
GitHub51[clang-lm32] sbourdeauducq pushed 51 new commits to master: http://bit.ly/mnvclJ08:46
GitHub51[clang-lm32/master] Allow comparison between block pointers and NULL pointer... - Douglas Gregor08:46
GitHub51[clang-lm32/master] Stylistic fix: move virtual keyword before return type.... - Evan Cheng08:46
GitHub51[clang-lm32/master] Move computation of __private_extern__ visibilty to... - Fariborz Jahanian08:46
kristianpaulfpgaminer: take a look to the sram immplementation in the milkmist port for avnet board09:10
kristianpaulis not xilinx specific, and is proven to work, so it should sinthesize on altera i bet09:11
lekernelomg git-cvsimport is so slow10:23
lekernel(and why are people using cvs anyway...)10:23
kristianpaulfpgaminer: http://ur1.ca/4gt8s16:17
fpgaminerkristianpaul: Lovely, thank you :)18:40
fpgaminerI'll actually probably use that more as a Wishbone learning tool18:40
fpgaminersince I haven't used Wishbone until ... well, yesterday! :P18:40
lekernelthere isn't much to know19:50
lekernelthe documentation is particularly verbose19:50
lekernelwith classic cycles, it's just sram with variable latency/acknowledgment signal19:51
lekernelcvbs output from m1 working (just test pattern and b&w for now)20:17
lekernel:)20:17
lekernelhttps://github.com/sbourdeauducq/paltest20:43
lekernelbtw http://lists.cs.uiuc.edu/pipermail/cfe-dev/2010-October/011711.html20:58
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