#milkymist IRC log for Friday, 2011-06-10

GitHub192flickernoise: master Xiangfu Liu * 3dcc584 (1 files in 1 dirs): flash.c: add TIMEOUT to web update download03:24
GitHub192flickernoise: master Xiangfu Liu * 379315e (1 files in 1 dirs): rsswall: libcurl the TIMEOUT should bigger then CONNECTTIMEOUT03:24
GitHub192flickernoise: master commits 893fe1a...379315e - http://bit.ly/lo7lcI03:24
xiangfuhow to test CONNECTTIME_OUT?, just give a wrong gateway ?03:26
kristianpaulping google?03:32
lekernelaw, everything ok with the gerber?07:31
awlekernel, so far now is okay though07:37
lekernelso I can publish the one you sent yesterday?07:37
awabout 20 minutes later, I'll send to list and you can check.07:37
awwait for me about 20 minutes though07:38
awI'll send to list for final design & gerber . :-)07:38
GitHub99flickernoise: master Sebastien Bourdeauducq * 83b6c8f (1 files in 1 dirs): Update: display different explanation in rescue mode - http://bit.ly/mS6Lhu07:49
awlekernel, just sent.08:20
lekernelcool, thanks.08:20
lekernelhow long does NH take to make the pcbs, btw?08:20
aw_usually 1~2 days to confirm files they receive and verify well, 7 days for making though; not include weekend.08:44
aw_the smt date is the mostly that i can't control though. :-)08:45
lekernelok, so I'd guess those things can go through assembly around June 21?08:45
aw_every year before Septermber, the smt date is typically to book since our qty is still not so such big scale. but it's okay..the smt vendor is nice to us just need to check though.08:47
aw_not sure now08:47
Guest42148lekernel: It'll be mid-July until everything is settled, I think.08:52
Guest42148oops, guest account :-) wolfgang here...08:52
lekernelincluding box, case assembly, etc.?08:53
wolfspraulyes exactly08:57
wolfsprauland also Adam will need some more time, defining this as June 21st now is not a good idea08:57
lekernelmore time for what?09:00
wolfspraulfor work09:00
lekernelmh, sure, but what kind of work? now that the pcb's are sent, what else needs to be done?09:01
wolfspraulthey are not sent yet09:01
wolfspraulthere are always surprises, always details. I don't need unrealistic plans that I then have to adjust many times along the way.09:03
wolfspraulyou know this manager rule when dealing with estimates - "whatever the engineer says times two"09:03
wolfspraulI don't see any major blockers anymore though, we have so many things in place.09:04
wolfspraulit should be unstoppable now :-)09:05
wolfspraullekernel: if you have time you can think about the Milkymist logo on the top acrylic. I heard all sorts of ideas with sanding etc.09:12
wolfspraulit will be good for the brand09:12
wolfspraulI'm not pursuing that though, so I'm moving forward without this right now.09:12
wolfspraulwe can always do this later09:13
lekernelyeah, I should see roh, but it seems it's difficult to meet him atm ... :(09:13
lekernelso many things are so painfully slow...09:14
wolfspraulmaybe they just appear so, you need a little more faith into the team :-)09:15
wolfspraulI am working on m1 every day09:15
wolfsprauland only on m109:16
lekernelaw_, the slot holes of the DC power supply jack look funny in Altium09:30
lekernelthey have a very small circular hole in the middle...09:30
aw_yes, no problem on them which rc1 &  rc2 didn't have, but it's okay that you can see the gerber's drill hole is okay.09:32
aw_so rc2 is 39.37 mil * 125.98 mil , now rc3 is 31.5 * 125.59 mil09:33
lekernelok, ok :)09:37
lekernelso you edit the drill file manually after Altium generates it?09:37
aw_not me, by house, yes, it's did by manually09:37
aw_in design file it's setting with "round" type,09:38
lekernelwhy do it like that? it sounds painful and a source of human errors09:38
aw_so when they generated drills, they noticed surely it's a type of round. :-)09:38
aw_well...if it's said that, of course, you can check rc2, it's round with "0" size drill mm.  in design file. :-)09:40
aw_but in drill file, it was not.09:40
aw_so this time in rc3, i added them with 31.5mm round.09:41
aw_have you done on DRC there?09:45
aw_should be only 18 warnings. :-) which is okay.09:45
lekernelah, so you fixed many undue DRC warnings which were there in rc2?09:46
aw_last time rc2, it seemed that had 40 warnings.09:47
aw_if all followed Altium internal s/w rules, i'll go crazy. :(  well...surely if all warnings are gone like build in C. it's perfect.09:49
aw_which tool you usually view gerber in windows laptop?09:51
aw_or you view it in linux laptop?09:51
lekernelI use gerbv in Linux10:01
aw_ok, that gerbv does not easily change layers to view compared to CAMtastic! 200010:05
lekernelyou mean change the order of layers?10:07
lekernelit does, click on the top/down arrows in the bottom left10:07
lekernelthis moves the selected layer up and down10:07
aw_yeah...so not easy to view though.10:08
aw_btw, have you seen Y2's Keep-Out layer?10:08
lekernelno, why?10:10
aw_my patched in rc2 i soldered Y2 at bottom side, I hope the placement now with Y2 doesn't influence those parallel lines connected to fpga10:10
lekernelhm, yes10:11
aw_what number of your rc1 board? from #2~ #6?10:14
aw_while mounted rc1 boards, #4~ #6 boards used a ethernet connector with http://downloads.qi-hardware.com/hardware/milkymist_one/datasheet/Ethernet/RTF-114B8A1A(023-00).pdf10:17
aw_I'll change my rc2 board to test that part.10:18
wpwrakaw_: (viewing gerbers) you can also write scripts that use gerbv to generate nice images. this sort of thing: http://downloads.qi-hardware.com/people/werner/wpan/tmp/atusb-110330-overview.png10:45
aw_wpwrak, wow...those images done by smart way. i didn't know then. :-)10:47
wpwrakaw_: project eda-tools, fab/prettygerbv10:49
aw_wpwrak, when view the new parts added, I usually use close s/w gerber viewer to click "check" of each layer, so for examples that i can know if the through hole pins with good drill without touching other layers10:49
wpwrakaw_: you'll need to change the file names and such, but the things is quite straightforward and probably not too hard to adapt to non-kicad systems10:50
aw_wpwrak, hup? already existed there, maybe i can try that in JTAG run2 to see.10:50
wpwrakaw_: if you have the drill data also as gebers, you can also include it. otherwise, you'd have to convert it to gerber. i've written a script that does that for kicad's excellon files (fab/drl2gerber), but that probably won't work with drill files from other sources10:51
wpwrakaw_: (click through layers) yes, that's how i often go through them, too, when looking for details. the overview images are more for a quick impression of the whole thing. sometimes, you can overlook the big mistake hidden in all the small details ;-)10:53
aw_wpwrak, yeah...caused i heard few cases that even design files are correct, then the generated gerber files are not same as design ones. indeed felt badly a bit, so when i view gerber,  i use that close tool which is really better than gerbv.11:07
aw_wpwrak, so i admire people can write scripts to overcome own cares. phew...i still don't know script language though.11:09
wpwrakaw_: it's really quite simple: http://projects.qi-hardware.com/index.php/p/eda-tools/source/tree/master/fab/prettygerbv11:10
wpwrakaw_: the difficult part was finding a set of colors that works (gerbv's color mixing algorithm is a bit difficult to predict). then front(), back(), etc. provide the file names. that's pretty much all.11:12
wpwraklet's see what MM1 would look like ...11:12
aw_wpwrak, :-), are you going to try your scripts on rc3 gerbers? :-)11:13
wpwraki see only the rc2 on milkymist.org ?11:14
lekernelwpwrak, http://downloads.qi-hardware.com/hardware/milkymist_one/gerber/rc3/rc3_gerber.tar.bz211:15
wpwraklekernel: thanks !11:15
wpwrakdoes altium always use the same numbers for the file names or is that project-dependent ? e.g., would the top solder paste always be called sm0626.pho ?11:18
wpwrakerr, i mean smd012911:19
aw_wpwrak, i am not sure, but you can define them firstly. :-)11:26
aw_wpwrak, can you import sm0626.pho?11:31
wpwrakyeah, i can read everything. also the drill file converts11:35
wpwrakconverts, but wrongly. but that's thanks to the quirks of those stone-age formats ... let's see how they do their decimal points ...11:38
aw_wpwrak, he :-) time to go, you can reply my email if a smart tool applies it with beautiful works/images later. :-)11:41
wpwrakheh, drill file and layers don't use the same origin :)11:52
wpwraki'm beginning to realize why the fabs are so obsessed with fiducials ;)11:53
wpwrakoh sweet. numbers are left-padded. and i thought hannibal lector was a wicked man.12:15
wpwrakwell, "padded" is the wrong word. aligned. e.g., what sane humans would call 1, 10, and 100, would be something like 001, 01, 112:19
wpwrakprobably useful to get the maximum accuracy out of each number before your relays overheat processing it ...12:20
wpwrakcute. the drill file expresses slotting operations as tools with an insane spindle speed. i guess just using a G command would have lacked coolness12:47
wpwrak(insane = 794'000 rpm. well, or maybe stuxnet now also infects altium ;-)12:48
wpwrakhmm no. the heuristics must be different. *scratch,scratch*12:56
Action: xiangfu change the IR test image to wait button '1' ~ '9' then '0', some remote controller don't have Volumeup or Standby makeby. but most of them have '0' ~ '9' :)13:33
GitHub147autotest-m1: master Xiangfu Liu * 55852b2 (1 files in 1 dirs): tests_ir: change the test buttons to 1 ~ 9, 0 - http://bit.ly/kZaqT013:57
lekernelwpwrak, nice gerber pics :)15:10
wpwrakthanks ! :) now, the real challenge is in the connectivity view ... in addition to the inherent complexity of having multiple layers, gerbv's color-merging algorithm also produces very counter-intuitive results15:12
wpwrakbtw, i'm not sure to what extent the lack of drill vs. mill indications in the drill file could be an issue for the pcb fab. right now, it looks as if they'd have to add this information manually, which bears a risk of human error15:13
GitHub102milkymist: master Xiangfu Liu * f4d446a (1 files in 1 dirs): rc5.v: fixed the timing problem thanks Jack ... - http://bit.ly/j41bUH18:09
GitHub81mtk: master Sebastien Bourdeauducq * 8aeb1a0 (5 files in 2 dirs): Basic translation support - http://bit.ly/kmSzld19:10
GitHub191flickernoise: master Sebastien Bourdeauducq * 570172b (5 files in 1 dirs): Basic translation support - http://bit.ly/lPG3HA19:10
GitHub198flickernoise: master Sebastien Bourdeauducq * b3285e5 (1 files in 1 dirs): More French translations - http://bit.ly/je36xU19:54
GitHub111mtk: master Sebastien Bourdeauducq * 90f8645 (1 files in 1 dirs): Remove unused smallmouse21:00
GitHub111mtk: master Sebastien Bourdeauducq * c6447f0 (2 files in 1 dirs): Don't translate empty and escaped strings21:00
GitHub111mtk: master commits 8aeb1a0...c6447f0 - http://bit.ly/myRA1021:00
GitHub15flickernoise: master Sebastien Bourdeauducq * 2caecc6 (8 files in 1 dirs): More translations - http://bit.ly/mwDJFP21:00
GitHub131flickernoise: master Sebastien Bourdeauducq * 5c03565 (5 files in 1 dirs): Almost all French translations - http://bit.ly/kdqvd821:13
kristianpaulargg, why23:55
kristianpauli got flood of **RAMB16BWER.v(311) ERROR** [1109] expression illegal token [[]23:55
kristianpaulbut i got sinthesis okay, hum.., another iverilog bug?23:56
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