#milkymist IRC log for Wednesday, 2011-05-04

kristianpaulinteresting bet from altera to mips, compared to xilinx with arm ;)04:07
kristianpauland with a softprocesor not cpu in the chip04:07
kristianpaulso nios is died..04:08
azonenbergkristianpaul: What about MIPS on xilinx?04:49
Action: azonenberg is building a mips softcore04:50
-:#milkymist- [freenode-info] channel flooding and no channel staff around to help? Please check with freenode support: http://freenode.net/faq.shtml#gettinghelp04:54
wpwraklekernel: (compressor_two.v) interesting ... no if ... <block> ... ? :)05:43
lekernelwpwrak: no and no documentation or test bench either08:28
wolfsprauland no reply in irc, so far :-)08:31
lekernelgot one yesterday08:32
lekernelso: he claims it works08:32
lekerneland wouldn't contest this code dump is a stinking mess08:32
wpwraklekernel: who needs documentation or testing if it works ? ;-))08:33
lekernelwell he did write a test bench08:33
lekernelyou can't pull off a complex piece of code like this without simulation08:33
lekernelhe did that incrementally, overwriting the test bench without keeping any history08:34
wpwrakburn, bridges, burn ! ;-)08:34
lekernelso now there's _one_ test bench in the repository, and it's even messier than the rest of the code08:34
lekernelalso, he also integrated quite tightly the sdram controller with the rest of the code, which means there is sdram-specific stuff all over the place08:35
wpwrakreminds me of those "real programmers" jokes :)08:35
lekernelit's horrible, really08:35
lekerneland in fact I'm impressed he managed to get anything to work with such methods08:35
wolfspraulnot surprised to hear this08:36
wolfspraulhe's a physicist, and then self-taught software engineer, electrical engineer, mechanical engineer, layout engineer, ic designer, ...08:36
wolfsprauland the worst is that afaik there never has been any serious amount of outside contribution to any of his stuff08:37
wolfspraulso the bottom line is that the code is not reusable?08:37
lekernelno, it's not08:38
wpwraklekernel: is anything in there that can be useful for a new implementation, or not even that ?08:45
lekernelI don't think so... maybe the architecture if it were documented :-P08:46
lekernelthere's one block diagram in a xcell article, but that's about how far as it goes08:46
wpwrakokay, saves about 5 minutes :)08:47
lekerneleven the indentation/style (or lack thereof) is awful08:47
lekerneland there are tons of code commented out all over, you're always wondering why08:48
wpwrak(indentation style) yeah, never fails as a warning sign08:49
wpwrak(commented-out code) reminds me of my vga experiments ;-)08:50
kristianpaulazonenberg: mips altera sorry11:06
juliam_cHello, first sorry for the length of my msg; i programed the Milkymist SoC on my Terasic DE1 Board which has a SDR-SDRAM. I adapted the wb_sdr_ctrl provided by lattice semi and it seems to work fine, i compiled and stored on flash the milkymist bios (using lm32-elf- toolchain downloaded from lattice web) and mr, mw commands shows that writing and reading to SDRAM is OK. I'm now trying to run uclinux with serialboot and flterm, i downloaded from your git22:16
juliam_c1. When i compiled with make vmlinux i get an error with the early_printk.c which i solved by excluding this function with menuconfig. the error occurs With both lm32-elf- and lm32-linux-22:16
juliam_c2. When i try to serialboot (with flterm) the image is copied to RAM from 0 to 100% and then it stops with a line that says "DONE" and thats all. I reset the board and noticed that the image vmlinux.bin is stored from 0x40000000 to 0x400(the size of the binary) and every seems to be right... i say "seems" becouse i compare the contents of the binary file with the readings using milkymist bios and the first lines and last lines are the same...22:16
juliam_c*are the same with the file's lines22:17
juliam_cPlease could anyone give me some advices, what should i do...22:18
lekerneljuliam_c: as far as I know, the lattice sdram controller license is not compatible with the GPL that MM SoC uses23:21
juliam_cBut isnt it the same license of the lm32_top??? for me it has been an issue too, where can i find more about that23:25
juliam_cI though all those components where the same as lm32...23:26
juliam_cI designed a controller for my board's ram but it's AMBA AHB interfaced maybe i could do the required modifications to make it wishbone compatible... but in conclusion do you mean can not use the lattice's design with MM SoC on my altera FPGA?????23:31
--- Thu May 5 201100:00

Generated by irclog2html.py 2.9.2 by Marius Gedminas - find it at mg.pov.lt!