#milkymist IRC log for Monday, 2011-04-25

carlobarhi, i have modified the the HPDMC controller in order to support 16 bits memories, but i got errors and i dont know whats wrong.00:09
carlobarThe HPDMC write/read 16 bit data, so i made an entity that perform 2 read/write to get a 32 bit data.00:09
carlobarI can read/write data using the bootloader, but when i try to write at 0x40002000, the data at 0x40000000 is overwriten, and i dont understand why. I made a simulation of a write operaion at 0x40002000, but it looks fine, someone can help me?00:09
kristianpaulhmm, icap allows multiboot02:34
kristianpaulbut is not clear to me if xilinx support partial reconfigurarion or core load/unload.. in spartan6..02:34
kristianpaulall what i found is about virtex02:34
kristianpaulmultiboot still nice, but not the main goal..02:35
kristianpaulwell, if you can resume and reboot fast enought... ;)02:42
kristianpaulhe,, http://www.xilinx.com/itp/xilinx7/books/data/docs/dev/dev0036_8.html02:46
kristianpaulwhere is my xilinx7 :D ??!!02:47
kristianpaul"current implementation of the bus macro uses eight 3-state buffer" ohh, 3 state02:51
kristianpauland saying, okay i can do reconfigure  partially, it will be not much that two "modules" it seems..03:02
kristianpaulbah, i forgot check  ack before read wb_data_i ..03:47
lekernelcarlobar: see fml doc, you need an uninterrupted stream of data, which means your hack cannot work unless you also double the DDR frequency10:19
lekernel(you can also just buy a M1 *g*)10:20
lekernelkristianpaul: partial reconfiguration works for spartan6, but as always it's bloody and dirty10:32
lekernelit doesn't use 3 state buffers though (the s6 doesn't have them anyway)10:32
lekerneland you can have as many modules as you want (or, more exactly, 1/16 of the FPGA tile count on S6, but that's a lot :p) but you have to be prepared to hack the tools and/or the bitstream files quite heavily for that, depending on how much flexibility you need10:35
kristianpaullekernel: (partial reconfiguration in s6) how do you know that? already tried? got some paper about it? or..10:41
lekerneli'm using the partial reconfiguration features to reverse engineer the bitstream format more easily10:41
kristianpaul:o10:42
kristianpaulha, cheating, you are taking apart the bistream  using partial reconf!10:42
kristianpaulmake sense10:43
lekerneljeje10:48
kristianpaul(it doesn't use 3 state buffers though) so, what it uses?10:49
kristianpaula special secret xilinx unviversal bus? :p10:49
lekernelhttp://www.xilinx.com/support/documentation/sw_manuals/xilinx13_1/ug702.pdf10:54
lekernelthis is more up to date10:54
lekernelbut for s6 they don't support it (and they said they will never) but many things should work anyway10:55
kristianpaulah10:56
lekernelhttp://forums.xilinx.com/t5/Spartan-Family-FPGAs/partial-dynamic-reconfiguration-for-Spartan-6/td-p/6251710:56
lekernelthey have this "difference based" reconfiguration too10:56
lekernel(which is officially supported for s6)10:56
lekernelguyzmo: hi16:05
lekerneldid you get some lua stuff to work?16:06
kristianpaulnot in a mipsel machine..16:17
kristianpauloops16:17
kristianpaul:D16:35
Action: lekernel wonders about the other features of that bot16:35
kristianpaullol16:40
kristianpaulat least joking is on the list of features16:41
kristianpauls/joking/humor16:41
lekernel!joke16:41
lekernel!fortune16:41
scrtslol :)19:12
mwallelarsc: are you an openwrt developer?21:50
tremnite all, sweet dreams21:57
--- Tue Apr 26 201100:00

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