#milkymist IRC log for Saturday, 2011-02-12

wpwraklekernel: how did you know i had gotten up ? scary ;-)05:09
lekernelwhat time is it in .ar?05:11
wpwraklekernel: now it is 07:1105:13
kristianpaulwpwrak: here??!!06:47
kristianpaul:-)06:47
wpwrakkristianpaul: lekernel invited me over. not quite sure why - maybe he just felt like having company :)06:51
kristianpaulWellcome then, :D06:53
wpwrakthanks ! :)06:53
Fallenoufirst portfile accepted : http://www.macports.org/ports.php?by=name&substr=lm3210:03
Fallenounext to be submitted : lm32-rtems-gcc10:03
Action: kristianpaul dont have mac10:09
lekernelyay, the llhdl toolchain produces an optimal netlist for simple designs12:27
lekernelroh: are you at the agency tomorrow?12:27
rohdunno12:30
rohmaybe12:30
kristianpaullekernel: simple is just conbinational logic i guess?12:39
lekernelnop12:39
lekernelflip flops are supported12:39
kristianpauloh !12:39
lekernelwhat isn't (yet) is multi-bit signals12:39
lekernelbut it should come rather soon12:39
lekernelhttp://www.milkymist.org/llhdl/llhdl.png12:42
kristianpaulbtw http://paste.debian.net/107430/12:43
roh*glue*13:30
roh*git server fix*13:30
wpwraklekernel: sweet !13:48
wpwraklekernel: so you're not too far from the point where kristianpaul could synthesize the shifter for his gps bitstream, right ? (not sure if you're familiar with his design)13:50
kristianpaulwpwrak: yeah !13:50
kristianpaulbut thats for SIE cause in Milkymist One, no way...13:50
kristianpaulalso SIE is diferent LUT as is spartan313:50
kristianpaulthe design is not the GREAT thing so..13:51
wpwrakkristianpaul: the design would make a nice real life example13:53
wpwrakkristianpaul: also in terms of marketing - "qi-hw now synthesizes first project entirely with free tools". now that's headline news. not the boring stuff about nokia's slow and painful death.13:55
lekernelkristianpaul: the toolchain should be semi-trivial to retarget to spartan3. also, there's no p&r and bitstream encoding tools yet13:56
lekernelwpwrak: it's way too early for such claims13:57
lekernelkristianpaul: what is that shifter doing?13:58
kristianpaullekernel: nothing else than sync a spi-like data in a byte13:59
lekerneldo you have a link to the source?13:59
wpwraklekernel: (p&r/bitstream) okay, seems that you need another weekend then ;-)13:59
kristianpaullekernel: http://projects.qi-hardware.com/index.php/p/ben-gps-sdr/source/tree/master/sige_acquisition/rtl/sige_acquisition.v14:00
wpwraklekernel: kristianpaul's design is quite simple, so that should help. it's expressed at a higher level, though.14:00
lekernelok, that would need vector, arithmetic and instantiation support14:01
lekernelwill take a while14:01
kristianpaulwpwrak: but i'm on the way of move it to the mm soc, so to get that handle by llhdl is long term task14:02
lekerneloh well, actually when your source is working with llhdl, it should be near to be able to synthesize an un-optimized mm soc14:03
kristianpaulhmm14:03
lekernelthe p&r tools will come later, let's focus on the front end for now and do that right14:04
lekernelxst, which is the tool to be replaced by llhdl, is also one of the crappiest elements in the xilinx toolchain14:04
wpwraklekernel: heh, priority by smelliness ;-)14:05
lekernelyeah and difficulty too14:05
lekerneli'm pretty sure i'll get the p&r and bitstream to work, so I start with the hard part14:05
kristianpaul i tought p&r was harder, but i guess optimization it is14:07
lekernelkristianpaul: can you use a synchronous design?14:08
kristianpaullekernel: sure14:08
lekernelright now you have an asynchronous design, which is to be avoided in fpgas, and you're also doing it wrong14:09
lekernelyou have unpredictable timing in the sync_counter -> counter_prev path14:09
lekernelalso, use the synchronous CE pin of flip flops instead of combinatorially generated local clocks like data_clk14:14
lekernelI guess ISE prints you a warning about that...14:14
lekernelbut doing like that instead of using CE wastes FPGA resources and is a source of unpredictable intermittent bugs14:15
lekernelyou can infer CE with always @(posedge clk) if(signal) register <= data;14:16
kristianpaulok, i need work on that part, was the only way i came out in that time to get a pulse synced with clk every time the counter overflow14:21
kristianpaulthanks for the correction and suguestion :-)14:22
wpwrakkristianpaul: now you already know your next bugs ;-)14:48
kristianpaulwpwrak: I got home work :-)17:24
kristianpaulThe llhdl commits should be anounced by the CIA-40 bot i think18:34
Fallenou+118:53
kristianpaullekernel: what shows GMP_INCLUDES in your system..19:02
kristianpauldamn something is not good with debian..19:03
kristianpaullibgmp is installed, i dont see what i'm missing19:03
Action: Fallenou waves hi to arroway_s :)20:25
arroway_shi20:25
kristianpaulhey20:29
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