#qi-hardware IRC log for Wednesday, 2017-05-31

promachmth: why is it buffer_size * polling rate ? it does not make immediate sense to me05:00
promachbesides, anyone familiar with interrupt controller logic for UART FIFO buffer  ?06:10
promachHow to handle idle cycles between two successive FIFO buffer writes/reads ?16:11
larscthrow a party!16:24
--- Thu Jun 1 201700:00

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