| --- Sun Aug 12 2012 | 00:00 | |
| valhalla | I've flashed the latest uboot (2012-07-11) on the nanonote and now it isn't booting from SD anymore (I press M+power it cycles inside uboot until I release M, and then starts from the nand) | 13:37 |
|---|---|---|
| xiangfu | valhalla, sorry about the bug, the code is same, after we update the gcc/uclibc, it woldn't boot from sd anymore | 13:42 |
| kristianpaul | :o | 13:43 |
| xiangfu | valhalla, please revert back to : http://downloads.qi-hardware.com/software/images/NanoNote/Ben/2011-11-13/openwrt-xburst-qi_lb60-u-boot.bin | 13:43 |
| xiangfu | valhalla, I will try to fix that bug next few days. (I am slow) | 13:43 |
| xiangfu | kristianpaul, Hi | 13:46 |
| xiangfu | kristianpaul, I have one fpga question. | 13:46 |
| kristianpaul | oh sure | 13:47 |
| kristianpaul | Hi ! | 13:47 |
| valhalla | xiangfu: ok, so it is a known problem, thanks | 13:48 |
| xiangfu | kristianpaul, here is a simple verlog code. | 13:48 |
| xiangfu | kristianpaul, if I don't connect any oscillator, the 'y'(which I connect a led) will flash. where is the clock from? | 13:50 |
| kristianpaul | i think i missed your pastebin.. | 13:50 |
| kristianpaul | you dont need an oscillator all times, it varies from what you want to synthesize | 13:51 |
| xiangfu | kristianpaul, here: http://pastebin.com/kLTn9JS2 | 13:52 |
| kristianpaul | and the .ucf? | 13:54 |
| xiangfu | kristianpaul, http://pastebin.com/bA6sxiKj | 13:54 |
| xiangfu | kristianpaul, there is nothing connect to P55. | 13:55 |
| kristianpaul | okay but is unconeected? | 13:56 |
| kristianpaul | not even grounded? | 13:56 |
| xiangfu | no ground. nothing. | 13:56 |
| kristianpaul | wich would made me think thats where you clock came from :) | 13:56 |
| kristianpaul | ah | 13:56 |
| xiangfu | that is my question. I use jtag load the bitstream to chip. | 13:57 |
| kristianpaul | i *think* your "clock" just came from the static, | 13:58 |
| kristianpaul | if you have a scope around you could try to see the LED input from fpga | 13:59 |
| kristianpaul | i bet is not that stable clock at all | 13:59 |
| kristianpaul | jtag have its own clock, not to be related with any other clock source used on your verilog project | 14:00 |
| kristianpaul | xiangfu: u there? | 14:00 |
| xiangfu | yes | 14:00 |
| kristianpaul | why you not try to ground that P50 | 14:01 |
| xiangfu | you mean P55? | 14:01 |
| kristianpaul | ah yes sorry | 14:01 |
| xiangfu | kristianpaul, here is my board: http://en.qi-hardware.com/wiki/Mini-slx9 | 14:01 |
| kristianpaul | from the verilog it self or externally | 14:02 |
| xiangfu | kristianpaul, all pins are not ground . I only connect the pins I am using. | 14:02 |
| kristianpaul | well, in your UCF file you claim that will use that P55 | 14:02 |
| kristianpaul | you dint.. but you either ground it.. | 14:02 |
| kristianpaul | so this could lead to unknow behavior i think | 14:03 |
| kristianpaul | ah nice board ! | 14:03 |
| kristianpaul | xiangfu: what i said answer your question? | 14:04 |
| xiangfu | (lead to unknow behavior i think). ok. | 14:05 |
| kristianpaul | i'm not 100% certain | 14:05 |
| kristianpaul | but just what i learn from milkymist, ie this https://github.com/milkymist/milkymist/blob/master/boards/milkymist-one/rtl/system.v#L1103 | 14:05 |
| xiangfu | ok. I have 40M,20M,8M,6M,2M oscillator | 14:06 |
| kristianpaul | made me think if not using it you should ground it "assign mc_clk = 1'b0;" | 14:06 |
| xiangfu | I try to connect 40M/20M to P55. | 14:06 |
| kristianpaul | in your case externally | 14:06 |
| kristianpaul | what happen when you connect it? | 14:07 |
| xiangfu | but the mc_clk is output. not like my P55(input) | 14:08 |
| kristianpaul | ahh true | 14:08 |
| xiangfu | kristianpaul, nothing happen. I keep get 0 from 'x' | 14:08 |
| xiangfu | I also not sure if my little oscillator board is working. | 14:08 |
| xiangfu | I just connect 3.3v and GND to the osc. and connect one wire to P55. | 14:09 |
| kristianpaul | you have scope? | 14:09 |
| xiangfu | from the datasheet. it says the userclk must be short then 0.8cm (Stubs, if necessary, must be shorter than 8 mm (0.3 inches).) | 14:10 |
| kristianpaul | hmm | 14:10 |
| xiangfu | kristianpaul, I have a usb scope. dso2090. but after update my system the 'openhantek' command not working any more. | 14:10 |
| wpwrak | your little board probably violates a 1000 design recommendations already. what's one more ? ;-)) | 14:11 |
| xiangfu | wpwrak, :-) | 14:11 |
| kristianpaul | xD | 14:11 |
| wpwrak | just try to run things at slow clocks and slow I/O (QUIETIO sounds good), then you should be able to get away with most things. | 14:11 |
| xiangfu | wpwrak, yes. I have 40M/20M osc on my desk. the 8M/6M/2M osc is one the way to my desk. :) | 14:14 |
| xiangfu | hope the 2M is slow enough. | 14:15 |
| xiangfu | the hdl code is interesting. is not running line by line. once power on. all lines code are running. :) | 14:16 |
| kristianpaul | yup | 14:16 |
| kristianpaul | as it is sinthesized | 14:17 |
| xiangfu | wpwrak, I read the QUIETIO is better for LED. | 14:17 |
| xiangfu | in fact I am not question understand. when should i use QUIETIO/SLOW/FAST | 14:17 |
| xiangfu | kristianpaul, wpwrak : after I remove 'clk/P55' the led still flashing. the code is like: http://pastebin.com/rYb33fVS | 14:18 |
| kristianpaul | how you connected a and b? | 14:19 |
| xiangfu | to 3.3v | 14:20 |
| kristianpaul | btw your counter missed a reset.. guess not matter much here but just to get used to use it :) | 14:21 |
| kristianpaul | but is flashing under the espected freq? | 14:23 |
| kristianpaul | if you ground 1 or b, it should stop | 14:24 |
| kristianpaul | s/1/a | 14:24 |
| xiangfu | it's flashing at expected freq. | 14:25 |
| xiangfu | if I ground b or a to GND, it will stop. | 14:25 |
| xiangfu | all works like there is a clock somewhere. | 14:26 |
| kristianpaul | the counter :-) | 14:28 |
| kristianpaul | thats your clock source | 14:32 |
| xiangfu | what you mean? | 14:34 |
| kristianpaul | your hdl code describe something that looks like a counter | 14:34 |
| kristianpaul | you have the build log at hand? | 14:37 |
| xiangfu | kristianpaul, I can rebuild it now. wait | 14:38 |
| xiangfu | kristianpaul, here is the full log: http://pastebin.com/6aGMku8k | 14:42 |
| kristianpaul | ah look line 111 | 14:45 |
| kristianpaul | that is a loop aka your clock source :-) | 14:45 |
| xiangfu | still don't understand :( | 14:52 |
| kristianpaul | you could make a clock using combinational logic | 14:53 |
| kristianpaul | thats a circuit input is fed by it own output | 14:53 |
| kristianpaul | so is a loop | 14:54 |
| xiangfu | ok | 14:54 |
| xiangfu | kristianpaul, thanks. I got it. | 14:54 |
| kristianpaul | sure? .. | 14:54 |
| kristianpaul | i still thinkking.. well i dont know how xst sinthesized it.. | 14:55 |
| xiangfu | I got some idea. not very clear. my goal is connect the external osc. this is not very important for now. :) | 14:55 |
| kristianpaul | ah ok | 14:55 |
| kristianpaul | you could even made an osc of the fpga, using a couple not gates in a loop :) | 14:55 |
| xiangfu | kristianpaul, is there some code? :) | 14:56 |
| kristianpaul | second | 14:57 |
| kristianpaul | oops, better minute i'm looking | 14:57 |
| kristianpaul | damn, so far i just found this ilustration http://goo.gl/oibwQ | 15:13 |
| xiangfu | sure I just take a look. and learn | 15:15 |
| Fallenou | xiangfu: hey :) experimenting some fpga design ? :) | 15:28 |
| LunaVorax | hi | 15:46 |
| Jay7 | http://youtu.be/ikD_3Vemkf0 | 20:13 |
| Jay7 | 3d tracking interface | 20:14 |
| Jay7 | even so: http://makeprojects.com/Project/A-Touchless-3D-Tracking-Interface/2233/1#.UCgOnztlyXI | 20:14 |
| --- Mon Aug 13 2012 | 00:00 | |
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