#qi-hardware IRC log for Wednesday, 2010-12-08

qi-bot[commit] Werner Almesberger: drl2gp: drilling and circle milling work, various fixes (more to come) http://qi-hw.com/p/cae-tools/49a42cb03:57
qi-bot[commit] Werner Almesberger: drl2gp.c: added milling of slots (more to come) http://qi-hw.com/p/cae-tools/32f36cc03:57
wolfspraulroh: great mail! :-)05:07
kristianpaulnice mails to read this morning :)07:21
wpwrak_finally some action on the list ;-)08:10
qi-bot[commit] kyak: qstardict: initial port http://qi-hw.com/p/openwrt-packages/fa4bfac09:11
kristianpaulwpwrak_: i need the counter if i'm planning to sync the shifted register agains the Xbusrt SoC i need at leasta  clk for the data09:54
wolfspra1landres-calderon: hi Andres!09:55
wolfspra1lwe got the 30 Aptina sensors in stock now09:55
kristianpaulandres-calderon: hola :)09:55
andres-calderonkristianpaul: hola09:56
andres-calderonwolfspra1l:  Almost has been finished the  XuĂ©'s schematic review.09:58
wolfspra1lI am super busy on the Milkymist One RC2 run, testing10:00
wolfspra1lall looks good10:00
wolfspra1lwe are discussing the goals for the Xue run, everything 100% KiCad process etc.10:00
wolfspra1lfor the Milkymist One RC2 run, it looks like 36 or 37 boards out of 40 are 100% fully tested and pass10:00
wolfspra1lstill working :-)10:00
andres-calderonNice, Nelson is keen to buy one.10:01
andres-calderonHow much cost the MM1?10:03
wolfspra1lyou mean for sale? 350 USD10:03
wolfspra1lthat includes power adapter and jtag-serial board (which we don't have yet, working on it)10:03
andres-calderonyes, for sale10:04
wolfspra1lplus shipping10:04
andres-calderonWhen will there de MM1 in the news? Linuxfodevices, engadget, etc. ..10:07
wolfspra1lgood question10:07
wolfspra1lin my opinion, we should first add a case and turn it into a proper product10:08
wolfspra1leven if it has no FCC/CE certification, but then it may have to be a kit people need to assemble themselves10:08
wolfspra1lbetter would be a 'real' product of course, including fcc/ce10:08
wolfspra1lthen I would say that's at least 3 months out10:08
andres-calderon350 USD will be a good price.10:09
kristianpaulremenber M1 is a VJ Station10:09
wolfspra1landres-calderon: once it has a case it will be 499 USD10:09
wolfspra1land once it's there, we will drive it down again, 399 USD, etc.10:10
wolfspra1lbut that's a lot of hard work10:10
wolfspra1lstep by step10:10
wolfspra1lwe are not even done testing the rc2 run yet10:10
wolfspra1lthen we need to go full-power on the jtag-serial daughterboard10:10
wolfspra1lthen the case10:10
wolfspra1lthat's a nice development board, but I really don't compare with such boards at all10:11
wolfspra1lwe are working on a product, including software, tools, case, certification, etc.10:11
andres-calderonwolfspra1l, I think some if it will do. At least compared to  development boards the price is good.10:11
wolfspra1lyes, and I will try to drive the price down10:12
wolfspra1lI always feel technology is and must be inherently democratic, power to the people10:12
wolfspra1lso I'll squeeze out every USD, without compromising the freedom aspect of course10:12
wolfspra1leven if nobody cares, remember that those avnet boards are subsidized under Xilinx marketing budget10:12
wolfspra1lwhen the spartan-7 comes out, they stop selling this one. these are boards to spread their technology in the marketplace. nothing wrong with that, but the direction (and life expectancy) of such a board is very different from our product.10:13
wolfspra1lbut yeah, if we can even beat them on price, that's cool!10:14
wolfspra1lbut not my #1 focus10:14
andres-calderonwolfspra1l: avnet, digilent, huhorizons board are subsidized  by xilinx, ISSI, Linear, etc..10:14
wolfspra1lare you asking me or telling me?10:14
wolfspra1lI don't care. Even if Xilinx gives you 100 USD cash for every devboard from them, so what?10:14
wolfspra1lthen get a lot of them :-)10:15
wolfspra1lI work on a product.10:15
andres-calderonjust telling... the avnet, digilent, huhorizons boards are full of propaganda of the manufacturers of the chips.10:15
wolfspra1lof course10:15
wolfspra1lit's a marketing tool10:15
wolfspra1lso anyway10:16
wolfspra1lI am working on a great product.10:16
wolfspra1llong way :-)10:16
xiangfukyak: Hi. I want  start create a new openwrt image release tomorrow.10:38
qi-bot[commit] Xiangfu Liu: remove freedroid http://qi-hw.com/p/openwrt-packages/4ad9ef510:39
qi-bot[commit] Xiangfu Liu: remove BROKEN,add --without-mp3 by default http://qi-hw.com/p/openwrt-packages/760fbb110:39
qi-bot[commit] Xiangfu Liu: add moc qstardict to config.full_system http://qi-hw.com/p/openwrt-xburst/e9fe7d710:39
xiangfukyak: just base on the last commit of openwrt-xburst[e9fe7d7], openwrt-package[760fbb1].10:39
xiangfuI will test the image first tomorrow. :)10:40
xiangfukyak: need sleep, see you.10:41
wolfspra1lhe must have been sleepy :-)10:41
kristianpauloh moc10:43
kristianpaullets compile :)10:43
kristianpaulgood now vim automatically help me on indentation :)11:36
virichello back12:43
virictime to learn the halt sequence on openwrt..12:43
viric(basically, sysvinit)12:43
kristianpaulgood :)12:44
viricI don't have that solved...12:45
viric'halt -fp' powers down, but 'halt' does not power down.12:45
wpwrak_kristianpaul: (sync) hmm, what form of sync did you have in mind ?12:46
kristianpaulwpwrak_: simple as posible, i was thinking a clk and data  (4bit), mcu can read when clk go high12:50
kristianpaulthere is also a reset signal from mcu in order to do initialization12:50
wpwrak_kristianpaul: if you shift into a parallel bits, your SIGE SYNC becomes the CPU data clock12:52
wpwrak_kristianpaul: now, do you plan to use DMA ? or poll by software ?12:52
kristianpaulyup :)12:52
kristianpauldma dont know how12:52
kristianpaulpull by sofware for now12:53
kristianpaulgpio > ram > dump to disk12:53
wpwrak_then you could have a "data phase" signal. toggle it whenever you update the output, i.e., on each SYNC.12:53
wpwrak_for DMA, you would need a proper DMA request signal. you'd also want to go 8 bit, to avoid wasting half your memory/bandwidth, because DMA only has 8/16/32 bit size.12:54
kristianpaul8 bits easy, just other 4 wires grounded12:55
kristianpaulor you meant provide full 8 bit data per sample?12:56
wpwrak_the latter :)12:57
wpwrak_still easy: you either make the shifter 8 bits wide and divide incoming SYNC by two, or add a multiplexer12:58
kristianpaulah yes12:58
kristianpaulactually i need 16bits but QIQIQIQI not QQIIQQIIQQIIQQII12:59
kristianpaulwell that was the data format the guy from sdr-gps ask me for12:59
wpwrak_do you have enough I/Os for a 16 bit wide interface ?12:59
kristianpaulwell in SIE13:00
kristianpaulbut not in Ben if i think in long term13:00
wpwrak_for the  ben, you need something radically different anwyway13:00
kristianpaulreading SD espefication i founded GPS like a posible device for SDIO13:03
kristianpaulbut clasical GPS with ASIC not for doing SDR of course13:04
wpwrak_but how would the 16 bits be organized ? if the input is  sI0 mI0 sQ0 mQ0 sI1 mI1 sQ1 mQ1 sI2 mI2 sQ2 mQ2 sI3 mI3 sQ3 mQ3  what would be the 16 bit output ?13:04
wpwrak_(sdio) you could just do a bunk data transfer for SDR13:05
wpwrak_but that's something to worry about in the distant future :)13:06
kristianpaulsure sure13:06
wpwrak_by then you'll also be more confident at making interfaces with the FPGA :)13:06
kristianpaul(16 bit output) sIx and mQx in theory are not needed13:06
kristianpaulhehe confidence yes i must improve13:06
wpwrak_(throw away half the data) really ?13:07
kristianpauli saw a sofware that does it13:07
kristianpaulfor other dongle13:07
kristianpaulbut from 2 bit data , just 2 posible values from 4 are posible13:08
wpwrak_hmm. not 3 ?13:08
kristianpaulwell if 0 is ignore ;)13:08
wpwrak_-1, 0, +113:08
kristianpauli need to ask more about 013:08
kristianpaulnot sure yet13:09
wpwrak_so you would send a -1 or +1 instead of a 0, and have a "i sent an offset" bit you'd use to modify future bits ?13:09
kristianpaulanway lets take first the sample and lookg for how many 0 there13:09
wpwrak_my guess would be between 33 and 50% ;-) depends a bit on what the mysterious sign in the case of 0 really means13:10
kristianpaul( 0 really means) i still dont understand13:11
kristianpaulor my brain just focused on -1 and +1 when reading book theory13:11
kristianpauli shoudl read again for sure later13:11
viricI can't find what openwrt does special at shutdown13:13
wpwrak_well, you could take a reference signal and see what happens if you eliminate all the 0s.13:14
kristianpaulwpwrak_: actually i need do some FFT on signal and i should get something interesting graph13:14
virickristianpaul: I see from inittab that it calls simply all the 'K*' rc scripts13:14
viricand one of those scripts has to run the power down, I think.13:15
kristianpaulsure is no that job of trigerhappy?13:15
viricI don't know what powers off the nanonote13:16
kristianpaulKEY_POWER       1       /sbin/poweroff13:16
viricwhat is that?13:16
kristianpaul                             already check this^ ?13:16
viricand what calls poweroff in the shutdown sequence?13:16
viricI know the poweroff command of sysvinit13:17
kristianpaul/sbin/ poweroff source code deserver a look13:18
kristianpaulyou may get surpriced13:18
kristianpaulsysvinit you're riht13:20
viricI have /sbin/poweroff13:21
viricbut I expect the system to do a proper shutdown and then power off, when I type 'halt'13:22
viricand in my system it does not happne :)13:22
viricit properly shuts down, but it does not power off.13:22
wpwrak_viric: just sync; sync; /sbin/halt -fp and be happy ? :)13:29
kristianpaulyay :)13:30
wpwrak_all the long ritualized suicide a "regular" halt performs is kinda dubious to me anyway13:30
kristianpaulwpwrak_: are you in favor of massive suiciede? no layers no advice13:32
wpwrak_it's a battery powered device. it can die "uncleanly" any moment. if you tell me your systems NEEDS an elaborate shutdown process, i can show you a system that's inherently flawed ;-)13:39
viricwpwrak_: I know that is your way :)13:48
viricwpwrak_: it's nice if openssh kills properly the active ssh conections...13:48
viricwpwrak_: if wtmp gets properly written...13:49
viricwpwrak_: if the filesystems get 'umounted' (sync; sync; is not the same as umounting :)13:49
wpwrak_viric: think of "sync" as a non-blocking "umount" that always succeeds ;-)13:51
wpwrak_i.e., precisely what you want when in a hurry to shut down :)13:51
viricit may work in the context where you know that there are no processes writing to the filesystem at that time :)13:54
wpwrak_if you have on-going write activity, things don't look too good anyway ;-) and hey, isn't that what they sold us journaling for ? ;-)14:02
qi-bot[commit] kyak: qstardict: adjust main window to look nicer http://qi-hw.com/p/openwrt-packages/c97f24914:09
kristianpaulah i finally found a use for the counter,14:17
kristianpauldebugging led :)14:17
steve|mwpwrak_: oh, you're hanging out here.. the world is so small.. I discovered m8cutils today14:23
steve|mfor hacking this device: http://wiki.steve-m.de/doku.php/epa_basis_reader14:23
wpwrak_steve|m: wow, digging up old stuff :)14:24
steve|mheh, indeed.. I tried my luck with the wadsp today, but didn't suceed.. "Txresinit deadline missed"14:28
steve|mtomorrow I'll receive the MiniProg1, then I have something to compare.. but your m8cutils might gain interest again, since 400.000 of those devices were given away for free with magazine "ComputerBild"14:31
wpwrak_wow. the disppearance of those old interfaces may prove to be a bit of a problem, though14:32
wpwrak_steve|m: did you connect it directly to a serial port on the PC or via a USB-to-serial dongle ? the latter would explain the problem14:34
steve|mI used the OpenMoko debug board (ft2232), and omitted the 1.5k resistors, since it has already 3.3V levels.. (which might be a problem as well)14:35
wpwrak_hmm, so you used it as a USB-to-serial dongle ? or did you run m8cprog on the Neo ?14:37
wpwrak_for resistors, i think you still need the pull-down (R1)14:38
wpwrak_voltage may be okay14:39
steve|mwpwrak_: yeah, I used it as a usb serial dongle..14:39
wpwrak_ah, that wouldn't work. it's too slow.14:40
wpwrak_the PSoCs have some fairly tight timing14:40
steve|mah, okay.. that's why you're even using RT stuff (I wondered already..)14:40
wpwrak_what you could do is make m8cprog run on the Neo and control GPIOs directly14:41
wpwrak_similar to http://projects.qi-hardware.com/index.php/p/f32xbase/source/tree/master/f32x14:41
wpwrak_(that one works on Neo+debug board and Ben)14:42
steve|mwpwrak_: mh, I have no neo.. but yeah.. I did something like that a few weeks ago with the seagate dockstar (used the GPIOs as logic analyzer), so I have some code lying around14:42
wpwrak_steve|m: here's the setup with the Neo: http://www.almesberger.net/misc/idbg/14:42
wpwrak_perfect. then you're all set :)14:43
steve|msampling speed was something like 40MHz, so this should be enough :)14:44
wpwrak_yeah. you'll run circles around the little chip :)14:45
steve|mbut maybe they have the flash-protection enabled.. but they say on their homepage it is upgradable via usb, so it can only be the "external" programmer lock14:50
wpwrak_if you do a full erase, you also erase the protection14:51
wpwrak_some of these chips even let you read their content if "protection" is enabled ;-)14:51
qi-bot[commit] Jiri Brozovsky: Small command line time tracker - openwrt port, patched for better help message. http://qi-hw.com/p/openwrt-packages/d02893d14:51
steve|moh, that's good to know.. so just like the AVR with chip erase14:51
steve|mwpwrak_: good to know!14:52
kristianpaulwpwrak_: (assign) yes i was wrong about real world asigment wich is done following some definitions in a ucf file in wichs in/out module name correspond15:16
kristianpaulactually i dont know why i said that :/15:16
wpwrak_confusion is a phenomenon that is know to occasionally affect people ;-)15:17
bartbeswould running enlightenment on the ben be possible?17:02
viricI tried 'echo mem > /sys/power/state'17:34
viricwhile the screen had no light (due to the inactivity timeout)17:35
viricand when back (pressing keys) the screen does not light at all17:35
bartbeshmm, can you manually activate the backlight?17:38
viricHow could I do it?17:38
bartbessince I forgot how to turn it off, I don't remember how to turn it on either17:38
bartbesbut give me a sec while I power on my ben17:39
viricthank you17:39
bartbesi see /sys/class/lcd/gpm940b0-lcd17:41
bartbesecho 0 > /sys/class/lcd/gpm940b-lcd/lcd_power17:42
bartbesviric: did it help?17:43
viricit is for turning on?17:43
viricI have a different lcd :)17:43
bartbes1 is off, 0 is on17:43
bartbesdoesn't it have an lcd_power file?17:44
viricI wait until it turns off... then I'll suspend.17:44
viricit has it has.17:44
bartbesthen try writing 0 to it17:44
bartbesif it doesn't work, try 117:44
bartbesit worked for me17:44
bartbesin fact, there even was a power/wakeup17:44
viricafter sleep?17:44
bartbesno, in the lcd folder, a file called power/wakeup17:45
viricthere is17:45
viricwhat does that mean?17:45
bartbesif you write.. say.. 1 to it, it should wake it up ;)17:45
bartbesbut hey, I don't know17:45
bartbesI'm no hw expert by a long shot17:45
bartbesI just like poking around17:46
virichow much it takes for the lcd to go black on inactivity?17:46
bartbesyou mean how long?17:46
bartbesI remember something about 15 secs, but I'm probably wrong17:47
bartbes(maybe that was gmu?)17:47
viricalmost 10 minutes passed here17:48
viricOh! Just now.17:48
viric# echo 1 > wakeup17:48
viric-bash: echo: write error: Invalid argument17:48
viricecho 0 or 1 to lcd_power does not help.17:49
viric'cat lcd_power' says 4, btw17:49
viric(after 'echo 1 > lcd_power')17:49
viricthen.. bad thing17:50
viricdoes it work for you? making it sleep through ssh when the lcd switched off.17:50
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