#homecmos IRC log for Friday, 2013-11-22

azonenberghttp://siliconpr0n.org/wiki/doku.php?id=classes:rpi_re14:09
azonenbergputting together a proposal to offer this class in the spring, any ideas?14:09
Sync__pretty steep learning curve :D14:14
azonenbergYou think it's too fast? What material would you spend >1 lecture on that is currently down as only 1?14:15
Sync__well, going from no idea to extracting a schem in 5 weeks is pretty hard imho14:16
azonenbergPerhaps, but i need something more concrete14:16
azonenbergIs there material i should cover that i don't have there?14:16
azonenbergis there something i'm not spending enough time on?14:17
Sync__how long are the lectures?14:17
berndjazonenberg, are you assuming that students would be familiar with the switch model for FETs?14:19
azonenbergberndj: Yes14:21
berndjdepending on what knowledge / skill you assume, i think asking students to figure out what a cell does might be a bit hard so soon into the classes14:21
azonenbergSwitch only, not assuming any knowledge of layout or analog characteristics14:21
berndjobviously also depends on the cell14:21
azonenbergthe latter are beyond the scope of the class, and the former will be introduced14:21
azonenbergI'd do simple cells14:21
azonenberglike NAND4 or something14:21
berndjok14:21
azonenbergthen maybe a flipflop for extra credit14:22
berndji was just thinking that some of the memory element cells could be a bit tough14:22
azonenbergoh, like a 6T SRAM?14:22
azonenbergYeah, not going to do that so early in the course14:22
berndjhow come SRAMs use 6 transistor cells but flipflops use loads more?14:23
Sync__srams want to be fast14:24
berndjeven that dynamic d-type flipflop is 914:24
berndjflipflops aren't supposed to be slow :-/14:24
azonenbergSRAMs include array logic and they normally have differential inputs/outputs14:24
azonenbergthe inverters etc don't count toward the 6 since you only include it at the edges of the array14:24
berndjok that's a handful right there in the inverters14:25
azonenbergYeah14:26
azonenbergbut those arent in the cell14:26
azonenbergthey're at the edges of the array14:26
azonenbergAn N-bit SRAM array isn't 6N transistors14:26
azonenbergit's 6N + K*log(n) + M14:26
azonenbergfor some constants K, M that depend on the array geometry etc14:27
azonenbergsorry, sqrt(n), not log(n)14:27
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