#homecmos IRC log for Saturday, 2013-06-29

--- Sat Jun 29 201300:00
berndjmagic's drc complains when a substrate contact is less than 4 lambda from a diffusion contact, also that opposite diffusions are too close18:08
berndjbut when i put the substrate contact directly adjacent to the diffusion contact, drc is happy. what gives? why is "opposite diffusions too close" not a problem then?18:08
berndjin both cases the intent is to strap the contacts together with m1. is it that magic's drc can't "see" that the contacts are strapped together, when there's a short m1 jumper connecting them?18:09
berndjwhee, the dff simulates correctly!19:48
berndjnot a full spice sim, just irsim's switch model simulation19:49
azonenbergOn a somewhat related note19:50
berndjhttp://www.bpj-code.co.za/downloads/btc-miner/dff-sim.png with "final" layout http://www.bpj-code.co.za/downloads/btc-miner/dff.png19:50
azonenbergi want to make a tool for automatic recognition of standard cells at some point19:50
azonenbergIn other words, given optical or secondary electron images of each layer19:51
berndjthat sounds hard :-/19:51
azonenberggenerate vectors19:51
azonenberg(possibly after manually drawing the boundary of each cell)19:51
azonenbergthen extract transistors from the vector images19:51
azonenbergand so a behavioral (not necessarily SPICE-level since process details are unknown) simulation with all possible inputs19:51
azonenbergand maybe some heuristics to speed things up19:51
azonenbergto determine "this is a NAND3"19:51
azonenberg"this is a positive edge triggered dff"19:52
berndjthat last step is the one i don't even know how i don't know how to do it19:52
azonenbergBasically, right now the first step in REing a standard cell chip is manually figuring out what each cell does19:52
azonenbergi'd like to automate that19:52
Sync_yeah that's a good idea ;)19:53
azonenbergsay "this is a cell", highlight it19:53
azonenbergfive seconds later "NAND2x1"19:53
berndjwould it be useful if you could at least find instances of common cells, regardless of their function?19:53
azonenbergdegate can find cells once you higlight one instance and give it a name19:53
berndj"there's a cell here, and it's the same as the one here, here and here"19:53
azonenbergBut it can't tell what is a cell19:53
azonenbergThat would be a little harder but nice19:53
Sync_oh degate can do that now19:53
azonenbergDegate also segfaults19:54
Sync_yes it is good at that19:54
azonenbergwhenever i try to add >1 layer in the last version i tried19:54
azonenbergi'm leaning toward writing my own tool19:54
azonenbergits too unstable :p19:54
Sync_yeah it sucks19:56
azonenbergWhat I dream of is an IDA for hardware19:56
azonenbergsomething that takes in either an FPGA bitstream or die photos19:56
azonenbergdoes extractions and recognizes cells on the photos, reverses the bitstream19:57
azonenbergnow you have a cell-level netlist19:57
azonenbergthen do heuristics and isomorphism checking within neighborhoods to find higher level structures like adders and muxes19:57
azonenbergand perhaps even known hard IP blocks19:57
berndjhash it all and make a rainbow table!19:58
Sync_oh actually, have y19:58
Sync_wrong channel19:58
azonenbergberndj: lol19:59
azonenbergseriousl, it would be awesome to take in die images and have it automatically find "functions" like ida does20:00
azonenbergbut they're standard cells20:00
azonenbergthen find higher level structures20:00
azonenbergand "decompile" the result to generic RTL20:00
azonenbergone module at first, you could then split stuff off as you saw fit20:00
Sync_I wonder when chip manufacturers will start to implement measures to stop people FIB from the bottom of the die20:01
azonenbergwell 3D stuff is going to be a big PITA to reverse :p20:03
Sync_yeah but that's not too popular :P20:08
Sync_having annoying structures on top is20:08
Sync_and I finally made some progress in metalization20:09
berndjwhat's #D stuff going to do to power densities?20:13
berndjaargh shift key! i mean 3D stuff20:14
--- Sun Jun 30 201300:00

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