#homecmos IRC log for Monday, 2013-01-14

--- Mon Jan 14 201300:00
Synchmm eh.00:38
azonenbergsoul-d: interesting13:33
wolfspraulazonenberg: I'm in this channel :-)14:14
wolfsprauldecap is good, just go ahead14:14
wolfspraulI took a fpgatools holiday break, but today I'm finally back at it14:14
wolfsprauldoing some work to support multiple packages (first is tqg144 and ftg256 of slx9)14:14
wolfspraulsince it's the first second package, I need to rewrite/cleanup a lot of places that make fixed assumptions which now need to be variable...14:15
azonenbergwolfspraul: h/o. let me send a pic14:15
azonenbergTop metal is boring though, i warn you :P14:15
azonenbergAnd i need to get CMP working better to get deeper14:15
azonenbergwet etching doesnt work well on modern small process tech14:16
Syncah speaking of which14:18
SyncI got a surplus plate and some pads from work14:18
azonenbergthis is the smallest tech i've worked with yet so i may kill the first die processing it14:18
azonenbergi actually scratched the passivation pretty badly during decap but luckily it only damaged the overglass so it should be fince once i get it off14:19
azonenbergfull color top-metal imagery of xc6slx4-2tqg144c14:19
SyncI also found out last night that rectangular vacuum chambers are a damn pain14:20
azonenbergi'm not trying to RE the whole device so i'm not particularly interested in the long-haul routing14:20
azonenbergi just want to see one slice naked14:20
azonenbergSo my plan is to CMP down until i can see slice boundaries, then do SEM imagery of one slice at high res14:20
Syncthat could be interesting14:21
azonenbergSync: i've worked iwth them before... what in particular?14:21
Syncin theory cmp is not that hard14:21
azonenbergMy friend has done cmp in his lab, i have the slurry but no pads or plates etc atm14:21
Syncwell, the plate material has to be insanely thick14:21
azonenbergyou mean to make it super flat?14:21
Syncthat is my only rant (damn physics)14:21
azonenbergi thought you meant for CMP14:21
Syncyes that too but regular lathe finish should do14:22
Syncif not, lap on surface plate14:22
azonenbergYeah, i just havent had the time to build myself any tooling yet14:22
azonenberga little thing called a thesis is getting mad and demanding my attention :P14:22
SyncI don't seem to care much about university lately14:23
azonenbergi'm expected to publish two papers by the end of the semester14:23
azonenbergone of which i havent even started, the other is making decent progress14:23
azonenbergwolfspraul: you can usually tell (paradoxically) that a chip is using very small process tech when the top metal layer looks featureless lol14:24
azonenbergBecause it means they have enough layers they can devote the top layer entirely to long-haul power routing and not do anything interesting14:24
Syncthe problem is that the frist 4-5 semester here are basic courses which are insanely boring14:24
azonenbergvs something with say 3 or 5 metal layers will usually have signal routing all the way up to the top wit ha few big power buses snaking around it14:24
azonenbergand oh lol14:24
Synckinda makes me want to give it up and climb trees full time14:24
azonenbergi just worked on my own projects and ran ahead of the curriculum14:25
Syncthat does not work here14:25
azonenberghow so14:25
SyncI can only take classes that are scheduled for my number of semesters or under14:26
Syncor rather, I can go there but they will not accept my exams14:26
azonenberglol well i meant outside the curriculum14:26
azonenbergworking on my own stuff14:26
azonenbergbut i also took advanced classes14:26
SyncI do that14:26
azonenbergif i hadnt taken crypto first semester i might have quit out of boredom :P14:26
Syncstill doesn't help the boring classes I have to do14:26
Syncand climbing trees gets me 60$/h14:27
SyncI probably will study for a while, it is free so there is no pressure at all14:29
soul-dhere they are reversing it  making it more expensive to study17:23
soul-dso  any plans  for quantum computing yet azonenberg  -> http://qulab.eng.yale.edu/documents/talks/Devoret-APS_Tutorial_090316s.pdf20:31
azonenberglol, not yet20:41
soul-dbet if you put  some current on nyan cat's tail     @ 0 K   you probably have a catbit  there20:46
soul-dwonders if catbits have spin20:48
azonenbergyou should ask that in ##electronics lol20:49
azonenbergthere's a lot of kittehs there :P20:49
soul-ddone :P20:54
soul-ddoubt they will answer though20:54
soul-danyhow pdf is interesting although wish i knew  bit more  background  physics / math  with it20:57
soul-dlike so  you can read what  it say's + as plus (if not reading vhdl then it sucks lol )   instead of    weird math symbol20:59
soul-dso maybe uin hindsight not that good idea afterall :P20:59
azonenbergi'll look at it at some point lol21:00
nmz787soul-d: the boring classes are the hardest22:19
azonenbergi know the feeling22:20
Action: azonenberg did rather poorly in a math class last semester as a result22:20
soul-dyeah being bored  is demotiving pretty quickly22:26
--- Tue Jan 15 201300:00

Generated by irclog2html.py 2.9.2 by Marius Gedminas - find it at mg.pov.lt!