| --- Tue Dec 27 2011 | 00:00 | |
| B0101 | hey azonenberg | 05:55 |
|---|---|---|
| azonenberg | Back, was visiting family for christmas | 20:22 |
| azonenberg | starting up experiments again for the new year :) | 20:22 |
| smeding | hey, man | 20:23 |
| smeding | merry belated christmas and such | 20:23 |
| azonenberg | ty | 20:23 |
| Action: smeding is doing some hardware dev of his own | 20:25 | |
| smeding | the laser projector project, still | 20:25 |
| azonenberg | very nice | 20:30 |
| azonenberg | brb | 20:30 |
| wolfspra1l | smeding: another laser projector? :-) | 21:00 |
| wolfspra1l | I've heard of marcan's openlase project before | 21:00 |
| wolfspra1l | does yours have a homepage? | 21:00 |
| azonenberg | I am going to be aggressively pushing lithography resolution in the near future | 21:02 |
| azonenberg | i want to hit submicron | 21:02 |
| azonenberg | even if only in PoC scale tests | 21:02 |
| lekernel | azonenberg: you should try to start with things like diffraction gratings... should be relatively easy | 21:05 |
| lekernel | and you can make fun ones, like those things you can put on laser pointers to project all sorts of shapes | 21:06 |
| azonenberg | lekernel: I know | 21:06 |
| azonenberg | thats the goal | 21:06 |
| azonenberg | i want to make an optical-wavelength diffraction grating | 21:06 |
| azonenberg | probably reflective | 21:06 |
| azonenberg | Evaporate nickel or chrome onto a bunch of microscope slides | 21:06 |
| azonenberg | then do litho | 21:06 |
| azonenberg | I'm going to get a "real" mask as that's been my limit in the past | 21:07 |
| lekernel | what materials do they use for the laser pointer thingies? | 21:07 |
| lekernel | would be fun to make your own | 21:07 |
| azonenberg | send the GDS over to a place like laserlab and have them send me 8000DPI film masks | 21:07 |
| azonenberg | That will give me 12.5um design rules and a 3.125um lambda | 21:08 |
| azonenberg | Times 4/10/40x reduction with my objectives | 21:08 |
| azonenberg | should be easily enough to hit submicron | 21:08 |
| azonenberg | I do question whether 12.5um might be too small to resolve on the mask side, i might have to make my design rule be more like 25 or 50 | 21:08 |
| azonenberg | But there's only one way to find out | 21:08 |
| azonenberg | The mask will cost me around $100 and be 10x16 inches usable area | 21:09 |
| azonenberg | so i'm gonna tile a mix of 2" contact masks and projection masks of various feature sizes | 21:09 |
| azonenberg | including test patterns and probably some comb drive stuff | 21:09 |
| smeding | wolfspra1l: nope, mine mostly doesn't exist yet | 21:22 |
| smeding | might not even bother with building the hardware | 21:22 |
| smeding | my UART for it won't work though :( | 21:23 |
| smeding | i'm writing VHDL, it's to familiarise myself with digital signal processing more | 21:25 |
| azonenberg | i see | 21:26 |
| azonenberg | And yeah a UART is a little slow for that kind of bandwidth | 21:26 |
| azonenberg | you'd be better off with USB | 21:26 |
| azonenberg | and ideally, feed the GDS into the FPGA over USB and have it do rasterization onboard | 21:26 |
| azonenberg | so as to avoid the 480Mbps bottleneck | 21:26 |
| azonenberg | Of course at that point you're basically writing a 2D GPU | 21:27 |
| azonenberg | Which is, to say the least, a nontrivial task | 21:27 |
| smeding | eh, i'm not going for many points/second at first | 21:29 |
| smeding | it will be a vector display | 21:29 |
| azonenberg | Oh | 21:29 |
| azonenberg | So you rent doing it for direct-write litho? | 21:29 |
| smeding | eh? this is just for playing | 21:29 |
| smeding | :p | 21:29 |
| azonenberg | arent* | 21:29 |
| smeding | nonono | 21:29 |
| smeding | this is pretty much a toy | 21:29 |
| azonenberg | Because i want to build a laser system using a bluray diode for doing lithography lol | 21:29 |
| smeding | i doubt you can use my code :p | 21:30 |
| azonenberg | lol | 21:30 |
| smeding | this is kind of the wrong channel for it, i suppose | 21:30 |
| smeding | but yeah, it's a toy -- PID loops in digital hardware to drive two galvos to scan a laser beam | 21:31 |
| azonenberg | I see | 21:31 |
| azonenberg | I'd be doing basically the same thing | 21:31 |
| azonenberg | Except trying for much higher tolerances | 21:31 |
| azonenberg | so i can get ~20 micron resolution | 21:31 |
| azonenberg | Might need some optics but we'll see | 21:31 |
| smeding | yeah, nice | 21:31 |
| smeding | this is just my foray into tinkering with DSP | 21:31 |
| smeding | i'm not quite sure how to do the actual control loop yet... i wrote the dinky motor driver and ADC readout modules | 21:32 |
| azonenberg | i see | 21:32 |
| azonenberg | I'm going to try for tens of MHz data rate if not better | 21:32 |
| azonenberg | ideally more like 100 | 21:32 |
| azonenberg | as in 100Mpps | 21:32 |
| azonenberg | which, on a scanning apparatus, should let me cover a small field (1cm^2) in a decent time | 21:33 |
| smeding | then i wrote a FIFO and now i'm working on a UART to hook to that | 21:33 |
| azonenberg | i see | 21:33 |
| smeding | then, the PID controller and the main controller that loads points from memory and presents them to the control loops | 21:33 |
| smeding | and can write from the uart-fifo to memory | 21:33 |
| smeding | but currently i have a silly error in my VHDL somewhere, but i can't see where and ISim won't tell me | 21:34 |
| azonenberg | how so? | 21:35 |
| smeding | it just tells me what VHDL process is in | 21:35 |
| smeding | it's the process that generates the new state data for the sort-of-state-machine | 21:35 |
| smeding | well, state machine, but not evidently so | 21:35 |
| smeding | it's pretty big (and probably inefficient) | 21:35 |
| azonenberg | If you want to see a nice simple uart in verilog, i wrote one i use in a couple of projects | 21:36 |
| azonenberg | no fifo, this is just the raw uart | 21:36 |
| smeding | i should have one in VHDL somewhere | 21:36 |
| smeding | but where's the fun in that | 21:36 |
| azonenberg | It's <200 lines | 21:36 |
| smeding | yeah so's this | 21:36 |
| smeding | 123 lines | 21:36 |
| azonenberg | Mine is 193 but pretty heavy commenting | 21:37 |
| azonenberg | http://pastebin.com/9rxLMFHS | 21:37 |
| azonenberg | It's also instrumented to log bytes to the console | 21:37 |
| azonenberg | So if you want to compare the two and see where they differe feel free | 21:38 |
| azonenberg | this is FPGA proven in a spartan-3a at 20.48 MHz while talking to an FT232 | 21:38 |
| azonenberg | at 115200 baud | 21:38 |
| smeding | oh, mine is just the rx side actually | 21:39 |
| azonenberg | Well this plays fine in TX mode too if you want to generate a waveform to test against | 21:40 |
| smeding | and probably overly complicated | 21:40 |
| azonenberg | Yours or mine? | 21:40 |
| smeding | mine | 21:40 |
| smeding | yours seems sane enough | 21:40 |
| azonenberg | Mine is pretty simple, the one complex feature i added was samplnig 90 degrees out of phase | 21:40 |
| azonenberg | to avoid any settling issues on the signal edge | 21:40 |
| smeding | yeah | 21:40 |
| azonenberg | i instead wait half a bit period | 21:40 |
| smeding | mine samples thrice | 21:41 |
| smeding | and does best of 3 | 21:41 |
| azonenberg | Thats the alternate option | 21:41 |
| smeding | i felt like overcomplicating | 21:41 |
| azonenberg | also, mine allows runtime changing of baud rate | 21:41 |
| smeding | neat | 21:42 |
| azonenberg | though i usually synthesize it with a constant since i dont need to change it | 21:42 |
| azonenberg | and it optimizes out a few gates | 21:42 |
| smeding | i'll brb | 21:42 |
| smeding | have to walk the dog | 21:42 |
| azonenberg | But theoretically as long as clkdiv does not change while a character is on the wire (in either direction) it should handle changing fine | 21:42 |
| smeding | back | 22:02 |
| smeding | actually i had been for a while | 22:02 |
| --- Wed Dec 28 2011 | 00:00 | |
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